linux/drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2022-2023 Microchip Technology Inc.
// PCI1xxxx OTP/EEPROM driver

#include <linux/auxiliary_bus.h>
#include <linux/device.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/nvmem-provider.h>

#include "mchp_pci1xxxx_gp.h"

#define AUX_DRIVER_NAME …
#define EEPROM_NAME …
#define OTP_NAME …

#define PERI_PF3_SYSTEM_REG_ADDR_BASE …
#define PERI_PF3_SYSTEM_REG_LENGTH …

#define EEPROM_SIZE_BYTES …
#define OTP_SIZE_BYTES …

#define CONFIG_REG_ADDR_BASE …
#define EEPROM_REG_ADDR_BASE …
#define OTP_REG_ADDR_BASE …

#define MMAP_OTP_OFFSET(x) …
#define MMAP_EEPROM_OFFSET(x) …
#define MMAP_CFG_OFFSET(x) …

#define EEPROM_CMD_REG …
#define EEPROM_DATA_REG …

#define EEPROM_CMD_EPC_WRITE …
#define EEPROM_CMD_EPC_TIMEOUT_BIT …
#define EEPROM_CMD_EPC_BUSY_BIT …

#define STATUS_READ_DELAY_US …
#define STATUS_READ_TIMEOUT_US …

#define OTP_ADDR_HIGH_OFFSET …
#define OTP_ADDR_LOW_OFFSET …
#define OTP_PRGM_DATA_OFFSET …
#define OTP_PRGM_MODE_OFFSET …
#define OTP_RD_DATA_OFFSET …
#define OTP_FUNC_CMD_OFFSET …
#define OTP_CMD_GO_OFFSET …
#define OTP_PASS_FAIL_OFFSET …
#define OTP_STATUS_OFFSET …

#define OTP_FUNC_RD_BIT …
#define OTP_FUNC_PGM_BIT …
#define OTP_CMD_GO_BIT …
#define OTP_STATUS_BUSY_BIT …
#define OTP_PGM_MODE_BYTE_BIT …
#define OTP_FAIL_BIT …

#define OTP_PWR_DN_BIT …
#define OTP_PWR_DN_OFFSET …

#define CFG_SYS_LOCK_OFFSET …
#define CFG_SYS_LOCK_PF3 …

#define BYTE_LOW …
#define BYTE_HIGH …

struct pci1xxxx_otp_eeprom_device { … };

static int set_sys_lock(struct pci1xxxx_otp_eeprom_device *priv)
{ … }

static void release_sys_lock(struct pci1xxxx_otp_eeprom_device *priv)
{ … }

static bool is_eeprom_responsive(struct pci1xxxx_otp_eeprom_device *priv)
{ … }

static int pci1xxxx_eeprom_read(void *priv_t, unsigned int off,
				void *buf_t, size_t count)
{ … }

static int pci1xxxx_eeprom_write(void *priv_t, unsigned int off,
				 void *value_t, size_t count)
{ … }

static void otp_device_set_address(struct pci1xxxx_otp_eeprom_device *priv,
				   u16 address)
{ … }

static int pci1xxxx_otp_read(void *priv_t, unsigned int off,
			     void *buf_t, size_t count)
{ … }

static int pci1xxxx_otp_write(void *priv_t, unsigned int off,
			      void *value_t, size_t count)
{ … }

static int pci1xxxx_otp_eeprom_probe(struct auxiliary_device *aux_dev,
				     const struct auxiliary_device_id *id)
{ … }

static void pci1xxxx_otp_eeprom_remove(struct auxiliary_device *aux_dev)
{ … }

static const struct auxiliary_device_id pci1xxxx_otp_eeprom_auxiliary_id_table[] = …;
MODULE_DEVICE_TABLE(auxiliary, pci1xxxx_otp_eeprom_auxiliary_id_table);

static struct auxiliary_driver pci1xxxx_otp_eeprom_driver = …;
module_auxiliary_driver(…) …;

MODULE_LICENSE(…) …;
MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;