/* SPDX-License-Identifier: GPL-2.0-only */ /* * TI/National Semiconductor LP3943 Device * * Copyright 2013 Texas Instruments * * Author: Milo Kim <[email protected]> */ #ifndef __MFD_LP3943_H__ #define __MFD_LP3943_H__ #include <linux/gpio.h> #include <linux/pwm.h> #include <linux/regmap.h> /* Registers */ #define LP3943_REG_GPIO_A … #define LP3943_REG_GPIO_B … #define LP3943_REG_PRESCALE0 … #define LP3943_REG_PWM0 … #define LP3943_REG_PRESCALE1 … #define LP3943_REG_PWM1 … #define LP3943_REG_MUX0 … #define LP3943_REG_MUX1 … #define LP3943_REG_MUX2 … #define LP3943_REG_MUX3 … /* Bit description for LP3943_REG_MUX0 ~ 3 */ #define LP3943_GPIO_IN … #define LP3943_GPIO_OUT_HIGH … #define LP3943_GPIO_OUT_LOW … #define LP3943_DIM_PWM0 … #define LP3943_DIM_PWM1 … #define LP3943_NUM_PWMS … enum lp3943_pwm_output { … }; /* * struct lp3943_pwm_map * @output: Output pins which are mapped to each PWM channel * @num_outputs: Number of outputs */ struct lp3943_pwm_map { … }; /* * struct lp3943_platform_data * @pwms: Output channel definitions for PWM channel 0 and 1 */ struct lp3943_platform_data { … }; /* * struct lp3943_reg_cfg * @reg: Register address * @mask: Register bit mask to be updated * @shift: Register bit shift */ struct lp3943_reg_cfg { … }; /* * struct lp3943 * @dev: Parent device pointer * @regmap: Used for I2C communication on accessing registers * @pdata: LP3943 platform specific data * @mux_cfg: Register configuration for pin MUX * @pin_used: Bit mask for output pin used. * This bitmask is used for pin assignment management. * 1 = pin used, 0 = available. * Only LSB 16 bits are used, but it is unsigned long type * for atomic bitwise operations. */ struct lp3943 { … }; int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read); int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data); int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data); #endif
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