// SPDX-License-Identifier: GPL-2.0-only /* * Host side test driver to test endpoint functionality * * Copyright (C) 2017 Texas Instruments * Author: Kishon Vijay Abraham I <[email protected]> */ #include <linux/crc32.h> #include <linux/cleanup.h> #include <linux/delay.h> #include <linux/fs.h> #include <linux/io.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/miscdevice.h> #include <linux/module.h> #include <linux/mutex.h> #include <linux/random.h> #include <linux/slab.h> #include <linux/uaccess.h> #include <linux/pci.h> #include <linux/pci_ids.h> #include <linux/pci_regs.h> #include <uapi/linux/pcitest.h> #define DRV_MODULE_NAME … #define IRQ_TYPE_UNDEFINED … #define IRQ_TYPE_INTX … #define IRQ_TYPE_MSI … #define IRQ_TYPE_MSIX … #define PCI_ENDPOINT_TEST_MAGIC … #define PCI_ENDPOINT_TEST_COMMAND … #define COMMAND_RAISE_INTX_IRQ … #define COMMAND_RAISE_MSI_IRQ … #define COMMAND_RAISE_MSIX_IRQ … #define COMMAND_READ … #define COMMAND_WRITE … #define COMMAND_COPY … #define PCI_ENDPOINT_TEST_STATUS … #define STATUS_READ_SUCCESS … #define STATUS_READ_FAIL … #define STATUS_WRITE_SUCCESS … #define STATUS_WRITE_FAIL … #define STATUS_COPY_SUCCESS … #define STATUS_COPY_FAIL … #define STATUS_IRQ_RAISED … #define STATUS_SRC_ADDR_INVALID … #define STATUS_DST_ADDR_INVALID … #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR … #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR … #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR … #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR … #define PCI_ENDPOINT_TEST_SIZE … #define PCI_ENDPOINT_TEST_CHECKSUM … #define PCI_ENDPOINT_TEST_IRQ_TYPE … #define PCI_ENDPOINT_TEST_IRQ_NUMBER … #define PCI_ENDPOINT_TEST_FLAGS … #define FLAG_USE_DMA … #define PCI_DEVICE_ID_TI_AM654 … #define PCI_DEVICE_ID_TI_J7200 … #define PCI_DEVICE_ID_TI_AM64 … #define PCI_DEVICE_ID_TI_J721S2 … #define PCI_DEVICE_ID_LS1088A … #define PCI_DEVICE_ID_IMX8 … #define is_am654_pci_dev(pdev) … #define PCI_DEVICE_ID_RENESAS_R8A774A1 … #define PCI_DEVICE_ID_RENESAS_R8A774B1 … #define PCI_DEVICE_ID_RENESAS_R8A774C0 … #define PCI_DEVICE_ID_RENESAS_R8A774E1 … #define PCI_DEVICE_ID_RENESAS_R8A779F0 … #define PCI_VENDOR_ID_ROCKCHIP … #define PCI_DEVICE_ID_ROCKCHIP_RK3588 … static DEFINE_IDA(pci_endpoint_test_ida); #define to_endpoint_test(priv) … static bool no_msi; module_param(no_msi, bool, 0444); MODULE_PARM_DESC(…) …; static int irq_type = …; module_param(irq_type, int, 0444); MODULE_PARM_DESC(…) …; enum pci_barno { … }; struct pci_endpoint_test { … }; struct pci_endpoint_test_data { … }; static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test, u32 offset) { … } static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test, u32 offset, u32 value) { … } static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id) { … } static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test) { … } static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test, int type) { … } static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test) { … } static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test) { … } static const u32 bar_test_pattern[] = …; static int pci_endpoint_test_bar_memcmp(struct pci_endpoint_test *test, enum pci_barno barno, int offset, void *write_buf, void *read_buf, int size) { … } static bool pci_endpoint_test_bar(struct pci_endpoint_test *test, enum pci_barno barno) { … } static bool pci_endpoint_test_intx_irq(struct pci_endpoint_test *test) { … } static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test, u16 msi_num, bool msix) { … } static int pci_endpoint_test_validate_xfer_params(struct device *dev, struct pci_endpoint_test_xfer_param *param, size_t alignment) { … } static bool pci_endpoint_test_copy(struct pci_endpoint_test *test, unsigned long arg) { … } static bool pci_endpoint_test_write(struct pci_endpoint_test *test, unsigned long arg) { … } static bool pci_endpoint_test_read(struct pci_endpoint_test *test, unsigned long arg) { … } static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test) { … } static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test, int req_irq_type) { … } static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { … } static const struct file_operations pci_endpoint_test_fops = …; static int pci_endpoint_test_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { … } static void pci_endpoint_test_remove(struct pci_dev *pdev) { … } static const struct pci_endpoint_test_data default_data = …; static const struct pci_endpoint_test_data am654_data = …; static const struct pci_endpoint_test_data j721e_data = …; static const struct pci_endpoint_test_data rk3588_data = …; /* * If the controller's Vendor/Device ID are programmable, you may be able to * use one of the existing entries for testing instead of adding a new one. */ static const struct pci_device_id pci_endpoint_test_tbl[] = …; MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl); static struct pci_driver pci_endpoint_test_driver = …; module_pci_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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