/* SPDX-License-Identifier: GPL-2.0-only */ /* * TI Touch Screen / ADC MFD driver * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __LINUX_TI_AM335X_TSCADC_MFD_H #define __LINUX_TI_AM335X_TSCADC_MFD_H #include <linux/bitfield.h> #include <linux/mfd/core.h> #include <linux/units.h> #define REG_RAWIRQSTATUS … #define REG_IRQSTATUS … #define REG_IRQENABLE … #define REG_IRQCLR … #define REG_IRQWAKEUP … #define REG_DMAENABLE_SET … #define REG_DMAENABLE_CLEAR … #define REG_CTRL … #define REG_ADCFSM … #define REG_CLKDIV … #define REG_SE … #define REG_IDLECONFIG … #define REG_CHARGECONFIG … #define REG_CHARGEDELAY … #define REG_STEPCONFIG(n) … #define REG_STEPDELAY(n) … #define REG_FIFO0CNT … #define REG_FIFO0THR … #define REG_FIFO1CNT … #define REG_FIFO1THR … #define REG_DMA1REQ … #define REG_FIFO0 … #define REG_FIFO1 … /* Register Bitfields */ /* IRQ wakeup enable */ #define IRQWKUP_ENB … /* IRQ enable */ #define IRQENB_HW_PEN … #define IRQENB_EOS … #define IRQENB_FIFO0THRES … #define IRQENB_FIFO0OVRRUN … #define IRQENB_FIFO0UNDRFLW … #define IRQENB_FIFO1THRES … #define IRQENB_FIFO1OVRRUN … #define IRQENB_FIFO1UNDRFLW … #define IRQENB_PENUP … /* Step Configuration */ #define STEPCONFIG_MODE(val) … #define STEPCONFIG_MODE_SWCNT … #define STEPCONFIG_MODE_HWSYNC … #define STEPCONFIG_AVG(val) … #define STEPCONFIG_AVG_16 … #define STEPCONFIG_XPP … #define STEPCONFIG_XNN … #define STEPCONFIG_YPP … #define STEPCONFIG_YNN … #define STEPCONFIG_XNP … #define STEPCONFIG_YPN … #define STEPCONFIG_RFP(val) … #define STEPCONFIG_RFP_VREFP … #define STEPCONFIG_INM(val) … #define STEPCONFIG_INM_ADCREFM … #define STEPCONFIG_INP(val) … #define STEPCONFIG_INP_AN4 … #define STEPCONFIG_INP_ADCREFM … #define STEPCONFIG_FIFO1 … #define STEPCONFIG_RFM(val) … #define STEPCONFIG_RFM_VREFN … /* Delay register */ #define STEPDELAY_OPEN(val) … #define STEPCONFIG_OPENDLY … #define STEPCONFIG_MAX_OPENDLY … #define STEPDELAY_SAMPLE(val) … #define STEPCONFIG_SAMPLEDLY … #define STEPCONFIG_MAX_SAMPLE … /* Charge Config */ #define STEPCHARGE_RFP(val) … #define STEPCHARGE_RFP_XPUL … #define STEPCHARGE_INM(val) … #define STEPCHARGE_INM_AN1 … #define STEPCHARGE_INP(val) … #define STEPCHARGE_RFM(val) … #define STEPCHARGE_RFM_XNUR … /* Charge delay */ #define CHARGEDLY_OPEN(val) … #define CHARGEDLY_OPENDLY … /* Control register */ #define CNTRLREG_SSENB … #define CNTRLREG_STEPID … #define CNTRLREG_TSC_STEPCONFIGWRT … #define CNTRLREG_POWERDOWN … #define CNTRLREG_TSC_AFE_CTRL(val) … #define CNTRLREG_TSC_4WIRE … #define CNTRLREG_TSC_5WIRE … #define CNTRLREG_TSC_ENB … /*Control registers bitfields for MAGADC IP */ #define CNTRLREG_MAGADCENB … #define CNTRLREG_MAG_PREAMP_PWRDOWN … #define CNTRLREG_MAG_PREAMP_BYPASS … /* FIFO READ Register */ #define FIFOREAD_DATA_MASK … #define FIFOREAD_CHNLID_MASK … /* DMA ENABLE/CLEAR Register */ #define DMA_FIFO0 … #define DMA_FIFO1 … /* Sequencer Status */ #define SEQ_STATUS … #define CHARGE_STEP … #define TSC_ADC_CLK … #define MAG_ADC_CLK … #define TOTAL_STEPS … #define TOTAL_CHANNELS … #define FIFO1_THRESHOLD … /* * time in us for processing a single channel, calculated as follows: * * max num cycles = open delay + (sample delay + conv time) * averaging * * max num cycles: 262143 + (255 + 13) * 16 = 266431 * * clock frequency: 26MHz / 8 = 3.25MHz * clock period: 1 / 3.25MHz = 308ns * * max processing time: 266431 * 308ns = 83ms(approx) */ #define IDLE_TIMEOUT_MS … #define TSCADC_CELLS … struct ti_tscadc_data { … }; struct ti_tscadc_dev { … }; static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p) { … } static inline bool ti_adc_with_touchscreen(struct ti_tscadc_dev *tscadc) { … } void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc); #endif
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