linux/drivers/gpio/gpio-lpc32xx.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * GPIO driver for LPC32xx SoC
 *
 * Author: Kevin Wells <[email protected]>
 *
 * Copyright (C) 2010 NXP Semiconductors
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/gpio/driver.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/module.h>

#define LPC32XX_GPIO_P3_INP_STATE
#define LPC32XX_GPIO_P3_OUTP_SET
#define LPC32XX_GPIO_P3_OUTP_CLR
#define LPC32XX_GPIO_P3_OUTP_STATE
#define LPC32XX_GPIO_P2_DIR_SET
#define LPC32XX_GPIO_P2_DIR_CLR
#define LPC32XX_GPIO_P2_DIR_STATE
#define LPC32XX_GPIO_P2_INP_STATE
#define LPC32XX_GPIO_P2_OUTP_SET
#define LPC32XX_GPIO_P2_OUTP_CLR
#define LPC32XX_GPIO_P2_MUX_SET
#define LPC32XX_GPIO_P2_MUX_CLR
#define LPC32XX_GPIO_P2_MUX_STATE
#define LPC32XX_GPIO_P0_INP_STATE
#define LPC32XX_GPIO_P0_OUTP_SET
#define LPC32XX_GPIO_P0_OUTP_CLR
#define LPC32XX_GPIO_P0_OUTP_STATE
#define LPC32XX_GPIO_P0_DIR_SET
#define LPC32XX_GPIO_P0_DIR_CLR
#define LPC32XX_GPIO_P0_DIR_STATE
#define LPC32XX_GPIO_P1_INP_STATE
#define LPC32XX_GPIO_P1_OUTP_SET
#define LPC32XX_GPIO_P1_OUTP_CLR
#define LPC32XX_GPIO_P1_OUTP_STATE
#define LPC32XX_GPIO_P1_DIR_SET
#define LPC32XX_GPIO_P1_DIR_CLR
#define LPC32XX_GPIO_P1_DIR_STATE

#define GPIO012_PIN_TO_BIT(x)
#define GPIO3_PIN_TO_BIT(x)
#define GPO3_PIN_TO_BIT(x)
#define GPIO012_PIN_IN_SEL(x, y)
#define GPIO3_PIN_IN_SHIFT(x)
#define GPIO3_PIN_IN_SEL(x, y)
#define GPIO3_PIN5_IN_SEL(x)
#define GPI3_PIN_IN_SEL(x, y)
#define GPO3_PIN_IN_SEL(x, y)

#define LPC32XX_GPIO_P0_MAX
#define LPC32XX_GPIO_P1_MAX
#define LPC32XX_GPIO_P2_MAX
#define LPC32XX_GPIO_P3_MAX
#define LPC32XX_GPI_P3_MAX
#define LPC32XX_GPO_P3_MAX

#define LPC32XX_GPIO_P0_GRP
#define LPC32XX_GPIO_P1_GRP
#define LPC32XX_GPIO_P2_GRP
#define LPC32XX_GPIO_P3_GRP
#define LPC32XX_GPI_P3_GRP
#define LPC32XX_GPO_P3_GRP

struct gpio_regs {};

/*
 * GPIO names
 */
static const char *gpio_p0_names[LPC32XX_GPIO_P0_MAX] =;

static const char *gpio_p1_names[LPC32XX_GPIO_P1_MAX] =;

static const char *gpio_p2_names[LPC32XX_GPIO_P2_MAX] =;

static const char *gpio_p3_names[LPC32XX_GPIO_P3_MAX] =;

static const char *gpi_p3_names[LPC32XX_GPI_P3_MAX] =;

static const char *gpo_p3_names[LPC32XX_GPO_P3_MAX] =;

static struct gpio_regs gpio_grp_regs_p0 =;

static struct gpio_regs gpio_grp_regs_p1 =;

static struct gpio_regs gpio_grp_regs_p2 =;

static struct gpio_regs gpio_grp_regs_p3 =;

struct lpc32xx_gpio_chip {};

static inline u32 gpreg_read(struct lpc32xx_gpio_chip *group, unsigned long offset)
{}

static inline void gpreg_write(struct lpc32xx_gpio_chip *group, u32 val, unsigned long offset)
{}

static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group,
	unsigned pin, int input)
{}

static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin, int input)
{}

static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group,
	unsigned pin, int high)
{}

static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin, int high)
{}

static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin, int high)
{}

static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group,
	unsigned pin)
{}

static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin)
{}

static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin)
{}

static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
	unsigned pin)
{}

/*
 * GPIO primitives.
 */
static int lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip,
	unsigned pin)
{}

static int lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip,
	unsigned pin)
{}

static int lpc32xx_gpio_dir_in_always(struct gpio_chip *chip,
	unsigned pin)
{}

static int lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin)
{}

static int lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin)
{}

static int lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin)
{}

static int lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static int lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static void lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin,
	int value)
{}

static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin)
{}

static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
{}

static int lpc32xx_gpio_to_irq_p01(struct gpio_chip *chip, unsigned offset)
{}

static int lpc32xx_gpio_to_irq_gpio_p3(struct gpio_chip *chip, unsigned offset)
{}

static int lpc32xx_gpio_to_irq_gpi_p3(struct gpio_chip *chip, unsigned offset)
{}

static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] =;

static int lpc32xx_of_xlate(struct gpio_chip *gc,
			    const struct of_phandle_args *gpiospec, u32 *flags)
{}

static int lpc32xx_gpio_probe(struct platform_device *pdev)
{}

static const struct of_device_id lpc32xx_gpio_of_match[] =;
MODULE_DEVICE_TABLE(of, lpc32xx_gpio_of_match);

static struct platform_driver lpc32xx_gpio_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_LICENSE();
MODULE_DESCRIPTION();