// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2020 MediaTek Inc. * * Author: Gene Chen <[email protected]> */ #include <linux/crc8.h> #include <linux/i2c.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/mfd/core.h> #include <linux/module.h> #include <linux/regmap.h> #include <linux/slab.h> enum { … }; struct mt6360_ddata { … }; #define MT6360_TCPC_SLAVEID … #define MT6360_PMIC_SLAVEID … #define MT6360_LDO_SLAVEID … #define MT6360_PMU_SLAVEID … #define MT6360_REG_TCPCSTART … #define MT6360_REG_TCPCEND … #define MT6360_REG_PMICSTART … #define MT6360_REG_PMICEND … #define MT6360_REG_LDOSTART … #define MT6360_REG_LDOEND … #define MT6360_REG_PMUSTART … #define MT6360_PMU_DEV_INFO … #define MT6360_PMU_CHG_IRQ1 … #define MT6360_PMU_CHG_MASK1 … #define MT6360_REG_PMUEND … #define MT6360_PMU_IRQ_REGNUM … #define CHIP_VEN_MASK … #define CHIP_VEN_MT6360 … #define CHIP_REV_MASK … #define MT6360_ADDRESS_MASK … #define MT6360_DATA_SIZE_1_BYTE … #define MT6360_DATA_SIZE_2_BYTES … #define MT6360_DATA_SIZE_3_BYTES … #define MT6360_DATA_SIZE_4_BYTES … #define MT6360_CRC8_POLYNOMIAL … #define MT6360_CRC_I2C_ADDR_SIZE … #define MT6360_CRC_REG_ADDR_SIZE … /* prealloca read size = i2c device addr + i2c reg addr + val ... + crc8 */ #define MT6360_ALLOC_READ_SIZE(_size) … /* prealloca write size = i2c device addr + i2c reg addr + val ... + crc8 + dummy byte */ #define MT6360_ALLOC_WRITE_SIZE(_size) … #define MT6360_CRC_PREDATA_OFFSET … #define MT6360_CRC_CRC8_SIZE … #define MT6360_CRC_DUMMY_BYTE_SIZE … #define MT6360_REGMAP_REG_BYTE_SIZE … #define I2C_ADDR_XLATE_8BIT(_addr, _rw) … /* reg 0 -> 0 ~ 7 */ #define MT6360_CHG_TREG_EVT … #define MT6360_CHG_AICR_EVT … #define MT6360_CHG_MIVR_EVT … #define MT6360_PWR_RDY_EVT … /* REG 1 -> 8 ~ 15 */ #define MT6360_CHG_BATSYSUV_EVT … #define MT6360_FLED_CHG_VINOVP_EVT … #define MT6360_CHG_VSYSUV_EVT … #define MT6360_CHG_VSYSOV_EVT … #define MT6360_CHG_VBATOV_EVT … #define MT6360_CHG_VBUSOV_EVT … /* REG 2 -> 16 ~ 23 */ /* REG 3 -> 24 ~ 31 */ #define MT6360_WD_PMU_DET … #define MT6360_WD_PMU_DONE … #define MT6360_CHG_TMRI … #define MT6360_CHG_ADPBADI … #define MT6360_CHG_RVPI … #define MT6360_OTPI … /* REG 4 -> 32 ~ 39 */ #define MT6360_CHG_AICCMEASL … #define MT6360_CHGDET_DONEI … #define MT6360_WDTMRI … #define MT6360_SSFINISHI … #define MT6360_CHG_RECHGI … #define MT6360_CHG_TERMI … #define MT6360_CHG_IEOCI … /* REG 5 -> 40 ~ 47 */ #define MT6360_PUMPX_DONEI … #define MT6360_BAT_OVP_ADC_EVT … #define MT6360_TYPEC_OTP_EVT … #define MT6360_ADC_WAKEUP_EVT … #define MT6360_ADC_DONEI … #define MT6360_BST_BATUVI … #define MT6360_BST_VBUSOVI … #define MT6360_BST_OLPI … /* REG 6 -> 48 ~ 55 */ #define MT6360_ATTACH_I … #define MT6360_DETACH_I … #define MT6360_QC30_STPDONE … #define MT6360_QC_VBUSDET_DONE … #define MT6360_HVDCP_DET … #define MT6360_CHGDETI … #define MT6360_DCDTI … /* REG 7 -> 56 ~ 63 */ #define MT6360_FOD_DONE_EVT … #define MT6360_FOD_OV_EVT … #define MT6360_CHRDET_UVP_EVT … #define MT6360_CHRDET_OVP_EVT … #define MT6360_CHRDET_EXT_EVT … #define MT6360_FOD_LR_EVT … #define MT6360_FOD_HR_EVT … #define MT6360_FOD_DISCHG_FAIL_EVT … /* REG 8 -> 64 ~ 71 */ #define MT6360_USBID_EVT … #define MT6360_APWDTRST_EVT … #define MT6360_EN_EVT … #define MT6360_QONB_RST_EVT … #define MT6360_MRSTB_EVT … #define MT6360_OTP_EVT … #define MT6360_VDDAOV_EVT … #define MT6360_SYSUV_EVT … /* REG 9 -> 72 ~ 79 */ #define MT6360_FLED_STRBPIN_EVT … #define MT6360_FLED_TORPIN_EVT … #define MT6360_FLED_TX_EVT … #define MT6360_FLED_LVF_EVT … #define MT6360_FLED2_SHORT_EVT … #define MT6360_FLED1_SHORT_EVT … /* REG 10 -> 80 ~ 87 */ #define MT6360_FLED2_STRB_EVT … #define MT6360_FLED1_STRB_EVT … #define MT6360_FLED2_STRB_TO_EVT … #define MT6360_FLED1_STRB_TO_EVT … #define MT6360_FLED2_TOR_EVT … #define MT6360_FLED1_TOR_EVT … /* REG 11 -> 88 ~ 95 */ /* REG 12 -> 96 ~ 103 */ #define MT6360_BUCK1_PGB_EVT … #define MT6360_BUCK1_OC_EVT … #define MT6360_BUCK1_OV_EVT … #define MT6360_BUCK1_UV_EVT … /* REG 13 -> 104 ~ 111 */ #define MT6360_BUCK2_PGB_EVT … #define MT6360_BUCK2_OC_EVT … #define MT6360_BUCK2_OV_EVT … #define MT6360_BUCK2_UV_EVT … /* REG 14 -> 112 ~ 119 */ #define MT6360_LDO1_OC_EVT … #define MT6360_LDO2_OC_EVT … #define MT6360_LDO3_OC_EVT … #define MT6360_LDO5_OC_EVT … #define MT6360_LDO6_OC_EVT … #define MT6360_LDO7_OC_EVT … /* REG 15 -> 120 ~ 127 */ #define MT6360_LDO1_PGB_EVT … #define MT6360_LDO2_PGB_EVT … #define MT6360_LDO3_PGB_EVT … #define MT6360_LDO5_PGB_EVT … #define MT6360_LDO6_PGB_EVT … #define MT6360_LDO7_PGB_EVT … static const struct regmap_irq mt6360_irqs[] = …; static const struct regmap_irq_chip mt6360_irq_chip = …; static const struct resource mt6360_adc_resources[] = …; static const struct resource mt6360_chg_resources[] = …; static const struct resource mt6360_led_resources[] = …; static const struct resource mt6360_regulator_resources[] = …; static const struct mfd_cell mt6360_devs[] = …; static int mt6360_check_vendor_info(struct mt6360_ddata *ddata) { … } static const unsigned short mt6360_slave_addr[MT6360_SLAVE_MAX] = …; static int mt6360_xlate_pmicldo_addr(u8 *addr, int rw_size) { … } static int mt6360_regmap_read(void *context, const void *reg, size_t reg_size, void *val, size_t val_size) { … } static int mt6360_regmap_write(void *context, const void *val, size_t val_size) { … } static const struct regmap_bus mt6360_regmap_bus = …; static bool mt6360_is_readwrite_reg(struct device *dev, unsigned int reg) { … } static const struct regmap_config mt6360_regmap_config = …; static int mt6360_probe(struct i2c_client *client) { … } static int __maybe_unused mt6360_suspend(struct device *dev) { … } static int __maybe_unused mt6360_resume(struct device *dev) { … } static SIMPLE_DEV_PM_OPS(mt6360_pm_ops, mt6360_suspend, mt6360_resume); static const struct of_device_id __maybe_unused mt6360_of_id[] = …; MODULE_DEVICE_TABLE(of, mt6360_of_id); static struct i2c_driver mt6360_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux