linux/drivers/mfd/timberdale.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * timberdale.h timberdale FPGA MFD driver defines
 * Copyright (c) 2009 Intel Corporation
 */

/* Supports:
 * Timberdale FPGA
 */

#ifndef MFD_TIMBERDALE_H
#define MFD_TIMBERDALE_H

#define DRV_VERSION

/* This driver only support versions >= 3.8 and < 4.0  */
#define TIMB_SUPPORTED_MAJOR

/* This driver only support minor >= 8 */
#define TIMB_REQUIRED_MINOR

/* Registers of the control area */
#define TIMB_REV_MAJOR
#define TIMB_REV_MINOR
#define TIMB_HW_CONFIG
#define TIMB_SW_RST

/* bits in the TIMB_HW_CONFIG register */
#define TIMB_HW_CONFIG_SPI_8BIT

#define TIMB_HW_VER_MASK
#define TIMB_HW_VER0
#define TIMB_HW_VER1
#define TIMB_HW_VER2
#define TIMB_HW_VER3

#define OCORESOFFSET
#define OCORESEND

#define SPIOFFSET
#define SPIEND

#define UARTLITEOFFSET
#define UARTLITEEND

#define RDSOFFSET
#define RDSEND

#define ETHOFFSET
#define ETHEND

#define GPIOOFFSET
#define GPIOEND

#define CHIPCTLOFFSET
#define CHIPCTLEND
#define CHIPCTLSIZE

#define INTCOFFSET
#define INTCEND
#define INTCSIZE

#define MOSTOFFSET
#define MOSTEND

#define UARTOFFSET
#define UARTEND

#define XIICOFFSET
#define XIICEND

#define I2SOFFSET
#define I2SEND

#define LOGIWOFFSET
#define LOGIWEND

#define MLCOREOFFSET
#define MLCOREEND

#define DMAOFFSET
#define DMAEND

/* SDHC0 is placed in PCI bar 1 */
#define SDHC0OFFSET
#define SDHC0END

/* SDHC1 is placed in PCI bar 2 */
#define SDHC1OFFSET
#define SDHC1END

#define PCI_VENDOR_ID_TIMB
#define PCI_DEVICE_ID_TIMB

#define IRQ_TIMBERDALE_INIC
#define IRQ_TIMBERDALE_MLB
#define IRQ_TIMBERDALE_GPIO
#define IRQ_TIMBERDALE_I2C
#define IRQ_TIMBERDALE_UART
#define IRQ_TIMBERDALE_DMA
#define IRQ_TIMBERDALE_I2S
#define IRQ_TIMBERDALE_TSC_INT
#define IRQ_TIMBERDALE_SDHC
#define IRQ_TIMBERDALE_ADV7180
#define IRQ_TIMBERDALE_ETHSW_IF
#define IRQ_TIMBERDALE_SPI
#define IRQ_TIMBERDALE_UARTLITE
#define IRQ_TIMBERDALE_MLCORE
#define IRQ_TIMBERDALE_MLCORE_BUF
#define IRQ_TIMBERDALE_RDS
#define TIMBERDALE_NR_IRQS

#define GPIO_PIN_ASCB
#define GPIO_PIN_INIC_RST
#define GPIO_PIN_BT_RST
#define GPIO_NR_PINS

/* DMA Channels */
#define DMA_UART_RX
#define DMA_UART_TX
#define DMA_MLB_RX
#define DMA_MLB_TX
#define DMA_VIDEO_RX
#define DMA_VIDEO_DROP
#define DMA_SDHCI_RX
#define DMA_SDHCI_TX
#define DMA_ETH_RX
#define DMA_ETH_TX

#endif