/* SPDX-License-Identifier: GPL-2.0 */ /* * Atmel SMC (Static Memory Controller) register offsets and bit definitions. * * Copyright (C) 2014 Atmel * Copyright (C) 2014 Free Electrons * * Author: Boris Brezillon <[email protected]> */ #ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_ #define _LINUX_MFD_SYSCON_ATMEL_SMC_H_ #include <linux/kernel.h> #include <linux/of.h> #include <linux/regmap.h> #define ATMEL_SMC_SETUP(cs) … #define ATMEL_HSMC_SETUP(layout, cs) … #define ATMEL_SMC_PULSE(cs) … #define ATMEL_HSMC_PULSE(layout, cs) … #define ATMEL_SMC_CYCLE(cs) … #define ATMEL_HSMC_CYCLE(layout, cs) … #define ATMEL_SMC_NWE_SHIFT … #define ATMEL_SMC_NCS_WR_SHIFT … #define ATMEL_SMC_NRD_SHIFT … #define ATMEL_SMC_NCS_RD_SHIFT … #define ATMEL_SMC_MODE(cs) … #define ATMEL_HSMC_MODE(layout, cs) … #define ATMEL_SMC_MODE_READMODE_MASK … #define ATMEL_SMC_MODE_READMODE_NCS … #define ATMEL_SMC_MODE_READMODE_NRD … #define ATMEL_SMC_MODE_WRITEMODE_MASK … #define ATMEL_SMC_MODE_WRITEMODE_NCS … #define ATMEL_SMC_MODE_WRITEMODE_NWE … #define ATMEL_SMC_MODE_EXNWMODE_MASK … #define ATMEL_SMC_MODE_EXNWMODE_DISABLE … #define ATMEL_SMC_MODE_EXNWMODE_FROZEN … #define ATMEL_SMC_MODE_EXNWMODE_READY … #define ATMEL_SMC_MODE_BAT_MASK … #define ATMEL_SMC_MODE_BAT_SELECT … #define ATMEL_SMC_MODE_BAT_WRITE … #define ATMEL_SMC_MODE_DBW_MASK … #define ATMEL_SMC_MODE_DBW_8 … #define ATMEL_SMC_MODE_DBW_16 … #define ATMEL_SMC_MODE_DBW_32 … #define ATMEL_SMC_MODE_TDF_MASK … #define ATMEL_SMC_MODE_TDF(x) … #define ATMEL_SMC_MODE_TDF_MAX … #define ATMEL_SMC_MODE_TDF_MIN … #define ATMEL_SMC_MODE_TDFMODE_OPTIMIZED … #define ATMEL_SMC_MODE_PMEN … #define ATMEL_SMC_MODE_PS_MASK … #define ATMEL_SMC_MODE_PS_4 … #define ATMEL_SMC_MODE_PS_8 … #define ATMEL_SMC_MODE_PS_16 … #define ATMEL_SMC_MODE_PS_32 … #define ATMEL_HSMC_TIMINGS(layout, cs) … #define ATMEL_HSMC_TIMINGS_OCMS … #define ATMEL_HSMC_TIMINGS_RBNSEL(x) … #define ATMEL_HSMC_TIMINGS_NFSEL … #define ATMEL_HSMC_TIMINGS_TCLR_SHIFT … #define ATMEL_HSMC_TIMINGS_TADL_SHIFT … #define ATMEL_HSMC_TIMINGS_TAR_SHIFT … #define ATMEL_HSMC_TIMINGS_TRR_SHIFT … #define ATMEL_HSMC_TIMINGS_TWB_SHIFT … struct atmel_hsmc_reg_layout { … }; /** * struct atmel_smc_cs_conf - SMC CS config as described in the datasheet. * @setup: NCS/NWE/NRD setup timings (not applicable to at91rm9200) * @pulse: NCS/NWE/NRD pulse timings (not applicable to at91rm9200) * @cycle: NWE/NRD cycle timings (not applicable to at91rm9200) * @timings: advanced NAND related timings (only applicable to HSMC) * @mode: all kind of config parameters (see the fields definition above). * The mode fields are different on at91rm9200 */ struct atmel_smc_cs_conf { … }; void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf); int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles); int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles); int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles); int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles); void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs, const struct atmel_smc_cs_conf *conf); void atmel_hsmc_cs_conf_apply(struct regmap *regmap, const struct atmel_hsmc_reg_layout *reglayout, int cs, const struct atmel_smc_cs_conf *conf); void atmel_smc_cs_conf_get(struct regmap *regmap, int cs, struct atmel_smc_cs_conf *conf); void atmel_hsmc_cs_conf_get(struct regmap *regmap, const struct atmel_hsmc_reg_layout *reglayout, int cs, struct atmel_smc_cs_conf *conf); const struct atmel_hsmc_reg_layout * atmel_hsmc_get_reg_layout(struct device_node *np); #endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
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