linux/drivers/gpio/gpio-npcm-sgpio.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Nuvoton NPCM Serial GPIO Driver
 *
 * Copyright (C) 2021 Nuvoton Technologies
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/gpio/driver.h>
#include <linux/hashtable.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/units.h>

#define MAX_NR_HW_SGPIO …

#define NPCM_IOXCFG1 …
#define NPCM_IOXCFG1_SFT_CLK …
#define NPCM_IOXCFG1_SCLK_POL …
#define NPCM_IOXCFG1_LDSH_POL …

#define NPCM_IOXCTS …
#define NPCM_IOXCTS_IOXIF_EN …
#define NPCM_IOXCTS_RD_MODE …
#define NPCM_IOXCTS_RD_MODE_PERIODIC …

#define NPCM_IOXCFG2 …
#define NPCM_IOXCFG2_PORT …

#define NPCM_IXOEVCFG_MASK …
#define NPCM_IXOEVCFG_FALLING …
#define NPCM_IXOEVCFG_RISING …
#define NPCM_IXOEVCFG_BOTH …

#define NPCM_CLK_MHZ …
#define NPCM_750_OPT …
#define NPCM_845_OPT …

#define GPIO_BANK(x) …
#define GPIO_BIT(x) …

/*
 * Select the frequency of shift clock.
 * The shift clock is a division of the APB clock.
 */
struct npcm_clk_cfg { … };

struct npcm_sgpio { … };

struct npcm_sgpio_bank { … };

enum npcm_sgpio_reg { … };

static const struct npcm_sgpio_bank npcm_sgpio_banks[] = …;

static void __iomem *bank_reg(struct npcm_sgpio *gpio,
			      const struct npcm_sgpio_bank *bank,
			      const enum npcm_sgpio_reg reg)
{ … }

static const struct npcm_sgpio_bank *offset_to_bank(unsigned int offset)
{ … }

static void npcm_sgpio_irqd_to_data(struct irq_data *d,
				    struct npcm_sgpio **gpio,
				    const struct npcm_sgpio_bank **bank,
				    u8 *bit, unsigned int *offset)
{ … }

static int npcm_sgpio_init_port(struct npcm_sgpio *gpio)
{ … }

static int npcm_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
{ … }

static int npcm_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
{ … }

static int npcm_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
{ … }

static void npcm_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
{ … }

static int npcm_sgpio_get(struct gpio_chip *gc, unsigned int offset)
{ … }

static void npcm_sgpio_setup_enable(struct npcm_sgpio *gpio, bool enable)
{ … }

static int npcm_sgpio_setup_clk(struct npcm_sgpio *gpio,
				const struct npcm_clk_cfg *clk_cfg)
{ … }

static void npcm_sgpio_irq_init_valid_mask(struct gpio_chip *gc,
					   unsigned long *valid_mask,
					   unsigned int ngpios)
{ … }

static void npcm_sgpio_irq_set_mask(struct irq_data *d, bool set)
{ … }

static void npcm_sgpio_irq_ack(struct irq_data *d)
{ … }

static void npcm_sgpio_irq_mask(struct irq_data *d)
{ … }

static void npcm_sgpio_irq_unmask(struct irq_data *d)
{ … }

static int npcm_sgpio_set_type(struct irq_data *d, unsigned int type)
{ … }

static void npcm_sgpio_irq_handler(struct irq_desc *desc)
{ … }

static const struct irq_chip sgpio_irq_chip = …;

static int npcm_sgpio_setup_irqs(struct npcm_sgpio *gpio,
				 struct platform_device *pdev)
{ … }

static int npcm_sgpio_probe(struct platform_device *pdev)
{ … }

static unsigned int npcm750_SFT_CLK[NPCM_750_OPT] = …;

static unsigned int npcm750_CLK_SEL[NPCM_750_OPT] = …;

static unsigned int npcm845_SFT_CLK[NPCM_845_OPT] = …;

static unsigned int npcm845_CLK_SEL[NPCM_845_OPT] = …;

static struct npcm_clk_cfg npcm750_sgpio_pdata = …;

static const struct npcm_clk_cfg npcm845_sgpio_pdata = …;

static const struct of_device_id npcm_sgpio_of_table[] = …;
MODULE_DEVICE_TABLE(of, npcm_sgpio_of_table);

static struct platform_driver npcm_sgpio_driver = …;
module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;