linux/drivers/gpio/gpio-pcf857x.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
 *
 * Copyright (C) 2007 David Brownell
 */

#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/spinlock.h>

static const struct i2c_device_id pcf857x_id[] =;
MODULE_DEVICE_TABLE(i2c, pcf857x_id);

static const struct of_device_id pcf857x_of_table[] =;
MODULE_DEVICE_TABLE(of, pcf857x_of_table);

/*
 * The pcf857x, pca857x, and pca967x chips only expose one read and one
 * write register.  Writing a "one" bit (to match the reset state) lets
 * that pin be used as an input; it's not an open-drain model, but acts
 * a bit like one.  This is described as "quasi-bidirectional"; read the
 * chip documentation for details.
 *
 * Many other I2C GPIO expander chips (like the pca953x models) have
 * more complex register models and more conventional circuitry using
 * push/pull drivers.  They often use the same 0x20..0x27 addresses as
 * pcf857x parts, making the "legacy" I2C driver model problematic.
 */
struct pcf857x {};

/*-------------------------------------------------------------------------*/

/* Talk to 8-bit I/O expander */

static int i2c_write_le8(struct i2c_client *client, unsigned int data)
{}

static int i2c_read_le8(struct i2c_client *client)
{}

/* Talk to 16-bit I/O expander */

static int i2c_write_le16(struct i2c_client *client, unsigned int word)
{}

static int i2c_read_le16(struct i2c_client *client)
{}

/*-------------------------------------------------------------------------*/

static int pcf857x_input(struct gpio_chip *chip, unsigned int offset)
{}

static int pcf857x_get(struct gpio_chip *chip, unsigned int offset)
{}

static int pcf857x_get_multiple(struct gpio_chip *chip, unsigned long *mask,
				unsigned long *bits)
{}

static int pcf857x_output(struct gpio_chip *chip, unsigned int offset, int value)
{}

static void pcf857x_set(struct gpio_chip *chip, unsigned int offset, int value)
{}

static void pcf857x_set_multiple(struct gpio_chip *chip, unsigned long *mask,
				 unsigned long *bits)
{}

/*-------------------------------------------------------------------------*/

static irqreturn_t pcf857x_irq(int irq, void *data)
{}

/*
 * NOP functions
 */
static void noop(struct irq_data *data) {}

static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
{}

static void pcf857x_irq_enable(struct irq_data *data)
{}

static void pcf857x_irq_disable(struct irq_data *data)
{}

static void pcf857x_irq_bus_lock(struct irq_data *data)
{}

static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
{}

static const struct irq_chip pcf857x_irq_chip =;

/*-------------------------------------------------------------------------*/

static int pcf857x_probe(struct i2c_client *client)
{}

static void pcf857x_shutdown(struct i2c_client *client)
{}

static struct i2c_driver pcf857x_driver =;

static int __init pcf857x_init(void)
{}
/* register after i2c postcore initcall and before
 * subsys initcalls that may rely on these GPIOs
 */
subsys_initcall(pcf857x_init);

static void __exit pcf857x_exit(void)
{}
module_exit(pcf857x_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_AUTHOR();