// SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2020 Intel Corporation. */ #include <linux/io-64-nonatomic-lo-hi.h> #include <linux/device.h> #include <linux/slab.h> #include <linux/pci.h> #include <cxlmem.h> #include <cxlpci.h> #include <pmu.h> #include "core.h" /** * DOC: cxl registers * * CXL device capabilities are enumerated by PCI DVSEC (Designated * Vendor-specific) and / or descriptors provided by platform firmware. * They can be defined as a set like the device and component registers * mandated by CXL Section 8.1.12.2 Memory Device PCIe Capabilities and * Extended Capabilities, or they can be individual capabilities * appended to bridged and endpoint devices. * * Provide common infrastructure for enumerating and mapping these * discrete capabilities. */ /** * cxl_probe_component_regs() - Detect CXL Component register blocks * @dev: Host device of the @base mapping * @base: Mapping containing the HDM Decoder Capability Header * @map: Map object describing the register block information found * * See CXL 2.0 8.2.4 Component Register Layout and Definition * See CXL 2.0 8.2.5.5 CXL Device Register Interface * * Probe for component register information and return it in map object. */ void cxl_probe_component_regs(struct device *dev, void __iomem *base, struct cxl_component_reg_map *map) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cxl_probe_device_regs() - Detect CXL Device register blocks * @dev: Host device of the @base mapping * @base: Mapping of CXL 2.0 8.2.8 CXL Device Register Interface * @map: Map object describing the register block information found * * Probe for device register information and return it in map object. */ void cxl_probe_device_regs(struct device *dev, void __iomem *base, struct cxl_device_reg_map *map) { … } EXPORT_SYMBOL_NS_GPL(…); void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr, resource_size_t length) { … } int cxl_map_component_regs(const struct cxl_register_map *map, struct cxl_component_regs *regs, unsigned long map_mask) { … } EXPORT_SYMBOL_NS_GPL(…); int cxl_map_device_regs(const struct cxl_register_map *map, struct cxl_device_regs *regs) { … } EXPORT_SYMBOL_NS_GPL(…); static bool cxl_decode_regblock(struct pci_dev *pdev, u32 reg_lo, u32 reg_hi, struct cxl_register_map *map) { … } /** * cxl_find_regblock_instance() - Locate a register block by type / index * @pdev: The CXL PCI device to enumerate. * @type: Register Block Indicator id * @map: Enumeration output, clobbered on error * @index: Index into which particular instance of a regblock wanted in the * order found in register locator DVSEC. * * Return: 0 if register block enumerated, negative error code otherwise * * A CXL DVSEC may point to one or more register blocks, search for them * by @type and @index. */ int cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_type type, struct cxl_register_map *map, int index) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cxl_find_regblock() - Locate register blocks by type * @pdev: The CXL PCI device to enumerate. * @type: Register Block Indicator id * @map: Enumeration output, clobbered on error * * Return: 0 if register block enumerated, negative error code otherwise * * A CXL DVSEC may point to one or more register blocks, search for them * by @type. */ int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type, struct cxl_register_map *map) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cxl_count_regblock() - Count instances of a given regblock type. * @pdev: The CXL PCI device to enumerate. * @type: Register Block Indicator id * * Some regblocks may be repeated. Count how many instances. * * Return: count of matching regblocks. */ int cxl_count_regblock(struct pci_dev *pdev, enum cxl_regloc_type type) { … } EXPORT_SYMBOL_NS_GPL(…); int cxl_map_pmu_regs(struct cxl_register_map *map, struct cxl_pmu_regs *regs) { … } EXPORT_SYMBOL_NS_GPL(…); static int cxl_map_regblock(struct cxl_register_map *map) { … } static void cxl_unmap_regblock(struct cxl_register_map *map) { … } static int cxl_probe_regs(struct cxl_register_map *map) { … } int cxl_setup_regs(struct cxl_register_map *map) { … } EXPORT_SYMBOL_NS_GPL(…); u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb) { … } resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri, enum cxl_rcrb which) { … } resource_size_t cxl_rcd_component_reg_phys(struct device *dev, struct cxl_dport *dport) { … } EXPORT_SYMBOL_NS_GPL(…);