linux/drivers/cxl/port.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
#include <linux/device.h>
#include <linux/module.h>
#include <linux/slab.h>

#include "cxlmem.h"
#include "cxlpci.h"

/**
 * DOC: cxl port
 *
 * The port driver enumerates dport via PCI and scans for HDM
 * (Host-managed-Device-Memory) decoder resources via the
 * @component_reg_phys value passed in by the agent that registered the
 * port. All descendant ports of a CXL root port (described by platform
 * firmware) are managed in this drivers context. Each driver instance
 * is responsible for tearing down the driver context of immediate
 * descendant ports. The locking for this is validated by
 * CONFIG_PROVE_CXL_LOCKING.
 *
 * The primary service this driver provides is presenting APIs to other
 * drivers to utilize the decoders, and indicating to userspace (via bind
 * status) the connectivity of the CXL.mem protocol throughout the
 * PCIe topology.
 */

static void schedule_detach(void *cxlmd)
{ … }

static int discover_region(struct device *dev, void *root)
{ … }

static int cxl_switch_port_probe(struct cxl_port *port)
{ … }

static int cxl_endpoint_port_probe(struct cxl_port *port)
{ … }

static int cxl_port_probe(struct device *dev)
{ … }

static ssize_t CDAT_read(struct file *filp, struct kobject *kobj,
			 struct bin_attribute *bin_attr, char *buf,
			 loff_t offset, size_t count)
{ … }

static BIN_ATTR_ADMIN_RO(CDAT, 0);

static umode_t cxl_port_bin_attr_is_visible(struct kobject *kobj,
					    struct bin_attribute *attr, int i)
{ … }

static struct bin_attribute *cxl_cdat_bin_attributes[] = …;

static struct attribute_group cxl_cdat_attribute_group = …;

static const struct attribute_group *cxl_port_attribute_groups[] = …;

static struct cxl_driver cxl_port_driver = …;

module_cxl_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_IMPORT_NS(…);
MODULE_ALIAS_CXL(…);