linux/drivers/cxl/acpi.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/acpi.h>
#include <linux/pci.h>
#include <linux/node.h>
#include <asm/div64.h>
#include "cxlpci.h"
#include "cxl.h"

#define CXL_RCRB_SIZE …

struct cxl_cxims_data { … };

static const guid_t acpi_cxl_qtg_id_guid = …;


static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
{ … }

struct cxl_cxims_context { … };

static int cxl_parse_cxims(union acpi_subtable_headers *header, void *arg,
			   const unsigned long end)
{ … }

static unsigned long cfmws_to_decoder_flags(int restrictions)
{ … }

static int cxl_acpi_cfmws_verify(struct device *dev,
				 struct acpi_cedt_cfmws *cfmws)
{ … }

/*
 * Note, @dev must be the first member, see 'struct cxl_chbs_context'
 * and mock_acpi_table_parse_cedt()
 */
struct cxl_cfmws_context { … };

/**
 * cxl_acpi_evaluate_qtg_dsm - Retrieve QTG ids via ACPI _DSM
 * @handle: ACPI handle
 * @coord: performance access coordinates
 * @entries: number of QTG IDs to return
 * @qos_class: int array provided by caller to return QTG IDs
 *
 * Return: number of QTG IDs returned, or -errno for errors
 *
 * Issue QTG _DSM with accompanied bandwidth and latency data in order to get
 * the QTG IDs that are suitable for the performance point in order of most
 * suitable to least suitable. Write back array of QTG IDs and return the
 * actual number of QTG IDs written back.
 */
static int
cxl_acpi_evaluate_qtg_dsm(acpi_handle handle, struct access_coordinate *coord,
			  int entries, int *qos_class)
{ … }

static int cxl_acpi_qos_class(struct cxl_root *cxl_root,
			      struct access_coordinate *coord, int entries,
			      int *qos_class)
{ … }

static const struct cxl_root_ops acpi_root_ops = …;

static void del_cxl_resource(struct resource *res)
{ … }

static struct resource *alloc_cxl_resource(resource_size_t base,
					   resource_size_t n, int id)
{ … }

static int add_or_reset_cxl_resource(struct resource *parent, struct resource *res)
{ … }

DEFINE_FREE(…)
DEFINE_FREE(…)
static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
			     struct cxl_cfmws_context *ctx)
{ … }

static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
			   const unsigned long end)
{ … }

__mock struct acpi_device *to_cxl_host_bridge(struct device *host,
					      struct device *dev)
{ … }

/* Note, @dev is used by mock_acpi_table_parse_cedt() */
struct cxl_chbs_context { … };

static int cxl_get_chbs_iter(union acpi_subtable_headers *header, void *arg,
			     const unsigned long end)
{ … }

static int cxl_get_chbs(struct device *dev, struct acpi_device *hb,
			struct cxl_chbs_context *ctx)
{ … }

static int get_genport_coordinates(struct device *dev, struct cxl_dport *dport)
{ … }

static int add_host_bridge_dport(struct device *match, void *arg)
{ … }

/*
 * A host bridge is a dport to a CFMWS decode and it is a uport to the
 * dport (PCIe Root Ports) in the host bridge.
 */
static int add_host_bridge_uport(struct device *match, void *arg)
{ … }

static int add_root_nvdimm_bridge(struct device *match, void *data)
{ … }

static struct lock_class_key cxl_root_key;

static void cxl_acpi_lock_reset_class(void *dev)
{ … }

static void cxl_set_public_resource(struct resource *priv, struct resource *pub)
{ … }

static struct resource *cxl_get_public_resource(struct resource *priv)
{ … }

static void remove_cxl_resources(void *data)
{ … }

/**
 * add_cxl_resources() - reflect CXL fixed memory windows in iomem_resource
 * @cxl_res: A standalone resource tree where each CXL window is a sibling
 *
 * Walk each CXL window in @cxl_res and add it to iomem_resource potentially
 * expanding its boundaries to ensure that any conflicting resources become
 * children. If a window is expanded it may then conflict with a another window
 * entry and require the window to be truncated or trimmed. Consider this
 * situation:
 *
 * |-- "CXL Window 0" --||----- "CXL Window 1" -----|
 * |--------------- "System RAM" -------------|
 *
 * ...where platform firmware has established as System RAM resource across 2
 * windows, but has left some portion of window 1 for dynamic CXL region
 * provisioning. In this case "Window 0" will span the entirety of the "System
 * RAM" span, and "CXL Window 1" is truncated to the remaining tail past the end
 * of that "System RAM" resource.
 */
static int add_cxl_resources(struct resource *cxl_res)
{ … }

static int pair_cxl_resource(struct device *dev, void *data)
{ … }

static int cxl_acpi_probe(struct platform_device *pdev)
{ … }

static const struct acpi_device_id cxl_acpi_ids[] = …;
MODULE_DEVICE_TABLE(acpi, cxl_acpi_ids);

static const struct platform_device_id cxl_test_ids[] = …;
MODULE_DEVICE_TABLE(platform, cxl_test_ids);

static struct platform_driver cxl_acpi_driver = …;

static int __init cxl_acpi_init(void)
{ … }

static void __exit cxl_acpi_exit(void)
{ … }

/* load before dax_hmem sees 'Soft Reserved' CXL ranges */
subsys_initcall(cxl_acpi_init);
module_exit(cxl_acpi_exit);
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_IMPORT_NS(…);
MODULE_IMPORT_NS(…);