/* SPDX-License-Identifier: GPL-2.0-only */ /* * Aic94xx SAS/SATA driver hardware registers definitions. * * Copyright (C) 2005 Adaptec, Inc. All rights reserved. * Copyright (C) 2005 Luben Tuikov <[email protected]> */ #ifndef _AIC94XX_REG_H_ #define _AIC94XX_REG_H_ #include <asm/io.h> #include "aic94xx_hwi.h" /* Values */ #define AIC9410_DEV_REV_B0 … /* MBAR0, SWA, SWB, SWC, internal memory space addresses */ #define REG_BASE_ADDR … #define REG_BASE_ADDR_CSEQCIO … #define REG_BASE_ADDR_EXSI … #define MBAR0_SWA_SIZE … extern u32 MBAR0_SWB_SIZE; #define MBAR0_SWC_SIZE … /* MBAR1, points to On Chip Memory */ #define OCM_BASE_ADDR … #define OCM_MAX_SIZE … /* Smallest address possible to reference */ #define ALL_BASE_ADDR … /* PCI configuration space registers */ #define PCI_IOBAR_OFFSET … #define PCI_CONF_MBAR1 … #define PCI_CONF_MBAR0_SWA … #define PCI_CONF_MBAR0_SWB … #define PCI_CONF_MBAR0_SWC … #define PCI_CONF_MBAR_KEY … #define PCI_CONF_FLSH_BAR … #include "aic94xx_reg_def.h" u8 asd_read_reg_byte(struct asd_ha_struct *asd_ha, u32 reg); u16 asd_read_reg_word(struct asd_ha_struct *asd_ha, u32 reg); u32 asd_read_reg_dword(struct asd_ha_struct *asd_ha, u32 reg); void asd_write_reg_byte(struct asd_ha_struct *asd_ha, u32 reg, u8 val); void asd_write_reg_word(struct asd_ha_struct *asd_ha, u32 reg, u16 val); void asd_write_reg_dword(struct asd_ha_struct *asd_ha, u32 reg, u32 val); void asd_read_reg_string(struct asd_ha_struct *asd_ha, void *dst, u32 offs, int count); void asd_write_reg_string(struct asd_ha_struct *asd_ha, void *src, u32 offs, int count); #define ASD_READ_OCM(type, ord, S) … ASD_READ_OCM(u8, byte, b); ASD_READ_OCM(u16,word, w); ASD_READ_OCM(u32,dword,l); #define ASD_WRITE_OCM(type, ord, S) … ASD_WRITE_OCM(u8, byte, b); ASD_WRITE_OCM(u16,word, w); ASD_WRITE_OCM(u32,dword,l); #define ASD_DDBSITE_READ(type, ord) … ASD_DDBSITE_READ(u32, dword); ASD_DDBSITE_READ(u16, word); static inline u8 asd_ddbsite_read_byte(struct asd_ha_struct *asd_ha, u16 ddb_site_no, u16 offs) { … } #define ASD_DDBSITE_WRITE(type, ord) … ASD_DDBSITE_WRITE(u32, dword); ASD_DDBSITE_WRITE(u16, word); static inline void asd_ddbsite_write_byte(struct asd_ha_struct *asd_ha, u16 ddb_site_no, u16 offs, u8 val) { … } #define ASD_SCBSITE_READ(type, ord) … ASD_SCBSITE_READ(u32, dword); ASD_SCBSITE_READ(u16, word); static inline u8 asd_scbsite_read_byte(struct asd_ha_struct *asd_ha, u16 scb_site_no, u16 offs) { … } #define ASD_SCBSITE_WRITE(type, ord) … ASD_SCBSITE_WRITE(u32, dword); ASD_SCBSITE_WRITE(u16, word); static inline void asd_scbsite_write_byte(struct asd_ha_struct *asd_ha, u16 scb_site_no, u16 offs, u8 val) { … } /** * asd_ddbsite_update_word -- atomically update a word in a ddb site * @asd_ha: pointer to host adapter structure * @ddb_site_no: the DDB site number * @offs: the offset into the DDB * @oldval: old value found in that offset * @newval: the new value to replace it * * This function is used when the sequencers are running and we need to * update a DDB site atomically without expensive pausing and upausing * of the sequencers and accessing the DDB site through the CIO bus. * * Return 0 on success; -EFAULT on parity error; -EAGAIN if the old value * is different than the current value at that offset. */ static inline int asd_ddbsite_update_word(struct asd_ha_struct *asd_ha, u16 ddb_site_no, u16 offs, u16 oldval, u16 newval) { … } static inline int asd_ddbsite_update_byte(struct asd_ha_struct *asd_ha, u16 ddb_site_no, u16 offs, u8 _oldval, u8 _newval) { … } static inline void asd_write_reg_addr(struct asd_ha_struct *asd_ha, u32 reg, dma_addr_t dma_handle) { … } static inline u32 asd_get_cmdctx_size(struct asd_ha_struct *asd_ha) { … } static inline u32 asd_get_devctx_size(struct asd_ha_struct *asd_ha) { … } static inline void asd_disable_ints(struct asd_ha_struct *asd_ha) { … } static inline void asd_enable_ints(struct asd_ha_struct *asd_ha) { … } #endif
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