/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation */ #ifndef __QLA_MR_H #define __QLA_MR_H #include "qla_dsd.h" /* * The PCI VendorID and DeviceID for our board. */ #define PCI_DEVICE_ID_QLOGIC_ISPF001 … /* FX00 specific definitions */ #define FX00_COMMAND_TYPE_7 … struct cmd_type_7_fx00 { … }; #define STATUS_TYPE_FX00 … struct sts_entry_fx00 { … }; #define MAX_HANDLE_COUNT … #define MULTI_STATUS_TYPE_FX00 … struct multi_sts_entry_fx00 { … }; #define TSK_MGMT_IOCB_TYPE_FX00 … struct tsk_mgmt_entry_fx00 { … }; #define ABORT_IOCB_TYPE_FX00 … struct abort_iocb_entry_fx00 { … }; #define IOCTL_IOSB_TYPE_FX00 … struct ioctl_iocb_entry_fx00 { … }; #define STATUS_CONT_TYPE_FX00 … #define FX00_IOCB_TYPE … struct fxdisc_entry_fx00 { … }; struct qlafx00_tgt_node_info { … } __packed; #define QLAFX00_TGT_NODE_INFO … #define QLAFX00_LINK_STATUS_DOWN … #define QLAFX00_LINK_STATUS_UP … #define QLAFX00_PORT_SPEED_2G … #define QLAFX00_PORT_SPEED_4G … #define QLAFX00_PORT_SPEED_8G … #define QLAFX00_PORT_SPEED_10G … struct port_info_data { … } __packed; /* OS Type Designations */ #define OS_TYPE_UNKNOWN … #define OS_TYPE_LINUX … /* Linux Info */ #define SYSNAME_LENGTH … #define NODENAME_LENGTH … #define RELEASE_LENGTH … #define VERSION_LENGTH … #define MACHINE_LENGTH … #define DOMNAME_LENGTH … struct host_system_info { … } __packed; struct register_host_info { … } __packed; #define QLAFX00_PORT_DATA_INFO … #define QLAFX00_TGT_NODE_LIST_SIZE … struct config_info_data { … } __packed; #define FXDISC_GET_CONFIG_INFO … #define FXDISC_GET_PORT_INFO … #define FXDISC_GET_TGT_NODE_INFO … #define FXDISC_GET_TGT_NODE_LIST … #define FXDISC_REG_HOST_INFO … #define FXDISC_ABORT_IOCTL … #define QLAFX00_HBA_ICNTRL_REG … #define QLAFX00_ICR_ENB_MASK … #define QLAFX00_ICR_DIS_MASK … #define QLAFX00_HST_RST_REG … #define QLAFX00_SOC_TEMP_REG … #define QLAFX00_HST_TO_HBA_REG … #define QLAFX00_HBA_TO_HOST_REG … #define QLAFX00_HST_INT_STS_BITS … #define QLAFX00_BAR1_BASE_ADDR_REG … #define QLAFX00_PEX0_WIN0_BASE_ADDR_REG … #define QLAFX00_INTR_MB_CMPLT … #define QLAFX00_INTR_RSP_CMPLT … #define QLAFX00_INTR_ASYNC_CMPLT … #define QLAFX00_MBA_SYSTEM_ERR … #define QLAFX00_MBA_TEMP_OVER … #define QLAFX00_MBA_TEMP_NORM … #define QLAFX00_MBA_TEMP_CRIT … #define QLAFX00_MBA_LINK_UP … #define QLAFX00_MBA_LINK_DOWN … #define QLAFX00_MBA_PORT_UPDATE … #define QLAFX00_MBA_SHUTDOWN_RQSTD … #define SOC_SW_RST_CONTROL_REG_CORE0 … #define SOC_FABRIC_RST_CONTROL_REG … #define SOC_FABRIC_CONTROL_REG … #define SOC_FABRIC_CONFIG_REG … #define SOC_PWR_MANAGEMENT_PWR_DOWN_REG … #define SOC_INTERRUPT_SOURCE_I_CONTROL_REG … #define SOC_CORE_TIMER_REG … #define SOC_IRQ_ACK_REG … #define CONTINUE_A64_TYPE_FX00 … #define QLAFX00_SET_HST_INTR(ha, value) … #define QLAFX00_CLR_HST_INTR(ha, value) … #define QLAFX00_RD_INTR_REG(ha) … #define QLAFX00_CLR_INTR_REG(ha, value) … #define QLAFX00_SET_HBA_SOC_REG(ha, off, val) … #define QLAFX00_GET_HBA_SOC_REG(ha, off) … #define QLAFX00_HBA_RST_REG(ha, val) … #define QLAFX00_RD_ICNTRL_REG(ha) … #define QLAFX00_ENABLE_ICNTRL_REG(ha) … #define QLAFX00_DISABLE_ICNTRL_REG(ha) … #define QLAFX00_RD_REG(ha, off) … #define QLAFX00_WR_REG(ha, off, val) … struct qla_mt_iocb_rqst_fx00 { … }; struct qla_mt_iocb_rsp_fx00 { … }; #define MAILBOX_REGISTER_COUNT_FX00 … #define AEN_MAILBOX_REGISTER_COUNT_FX00 … #define MAX_FIBRE_DEVICES_FX00 … #define MAX_LUNS_FX00 … #define MAX_TARGETS_FX00 … #define REQUEST_ENTRY_CNT_FX00 … #define RESPONSE_ENTRY_CNT_FX00 … /* * Firmware state codes for QLAFX00 adapters */ #define FSTATE_FX00_CONFIG_WAIT … #define FSTATE_FX00_INITIALIZED … #define FX00_DEF_RATOV … struct mr_data_fx00 { … }; #define QLAFX00_EXTENDED_IO_EN_MASK … /* * SoC Junction Temperature is stored in * bits 9:1 of SoC Junction Temperature Register * in a firmware specific format format. * To get the temperature in Celsius degrees * the value from this bitfiled should be converted * using this formula: * Temperature (degrees C) = ((3,153,000 - (10,000 * X)) / 13,825) * where X is the bit field value * this macro reads the register, extracts the bitfield value, * performs the calcualtions and returns temperature in Celsius */ #define QLAFX00_GET_TEMPERATURE(ha) … #define QLAFX00_LOOP_DOWN_TIME … #define QLAFX00_HEARTBEAT_INTERVAL … #define QLAFX00_HEARTBEAT_MISS_CNT … #define QLAFX00_RESET_INTERVAL … #define QLAFX00_MAX_RESET_INTERVAL … #define QLAFX00_CRITEMP_INTERVAL … #define QLAFX00_HINFO_RESEND_INTERVAL … #define QLAFX00_CRITEMP_THRSHLD … /* Max conncurrent IOs that can be queued */ #define QLAFX00_MAX_CANQUEUE … /* IOCTL IOCB abort success */ #define QLAFX00_IOCTL_ICOB_ABORT_SUCCESS … #endif
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