/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation */ #ifndef __QLA_DEF_H #define __QLA_DEF_H #include <linux/kernel.h> #include <linux/init.h> #include <linux/types.h> #include <linux/module.h> #include <linux/list.h> #include <linux/pci.h> #include <linux/dma-mapping.h> #include <linux/sched.h> #include <linux/slab.h> #include <linux/dmapool.h> #include <linux/mempool.h> #include <linux/spinlock.h> #include <linux/completion.h> #include <linux/interrupt.h> #include <linux/workqueue.h> #include <linux/firmware.h> #include <linux/mutex.h> #include <linux/btree.h> #include <scsi/scsi.h> #include <scsi/scsi_host.h> #include <scsi/scsi_device.h> #include <scsi/scsi_cmnd.h> #include <scsi/scsi_transport_fc.h> #include <scsi/scsi_bsg_fc.h> #include <uapi/scsi/fc/fc_els.h> #define QLA_DFS_DEFINE_DENTRY(_debugfs_file_name) … #define QLA_DFS_ROOT_DEFINE_DENTRY(_debugfs_file_name) … /* Big endian Fibre Channel S_ID (source ID) or D_ID (destination ID). */ be_id_t; /* Little endian Fibre Channel S_ID (source ID) or D_ID (destination ID). */ le_id_t; /* * 24 bit port ID type definition. */ port_id_t; #define INVALID_PORT_ID … #include "qla_bsg.h" #include "qla_dsd.h" #include "qla_nx.h" #include "qla_nx2.h" #include "qla_nvme.h" #define QLA2XXX_DRIVER_NAME … #define QLA2XXX_APIDEV … #define QLA2XXX_MANUFACTURER … /* * We have MAILBOX_REGISTER_COUNT sized arrays in a few places, * but that's fine as we don't look at the last 24 ones for * ISP2100 HBAs. */ #define MAILBOX_REGISTER_COUNT_2100 … #define MAILBOX_REGISTER_COUNT_2200 … #define MAILBOX_REGISTER_COUNT … #define QLA2200A_RISC_ROM_VER … #define FPM_2300 … #define FPM_2310 … #include "qla_settings.h" #define MODE_DUAL … /* * Data bit definitions */ #define BIT_0 … #define BIT_1 … #define BIT_2 … #define BIT_3 … #define BIT_4 … #define BIT_5 … #define BIT_6 … #define BIT_7 … #define BIT_8 … #define BIT_9 … #define BIT_10 … #define BIT_11 … #define BIT_12 … #define BIT_13 … #define BIT_14 … #define BIT_15 … #define BIT_16 … #define BIT_17 … #define BIT_18 … #define BIT_19 … #define BIT_20 … #define BIT_21 … #define BIT_22 … #define BIT_23 … #define BIT_24 … #define BIT_25 … #define BIT_26 … #define BIT_27 … #define BIT_28 … #define BIT_29 … #define BIT_30 … #define BIT_31 … #define LSB(x) … #define MSB(x) … #define LSW(x) … #define MSW(x) … #define LSD(x) … #define MSD(x) … static inline uint32_t make_handle(uint16_t x, uint16_t y) { … } /* * I/O register */ static inline u8 rd_reg_byte(const volatile u8 __iomem *addr) { … } static inline u16 rd_reg_word(const volatile __le16 __iomem *addr) { … } static inline u32 rd_reg_dword(const volatile __le32 __iomem *addr) { … } static inline u8 rd_reg_byte_relaxed(const volatile u8 __iomem *addr) { … } static inline u16 rd_reg_word_relaxed(const volatile __le16 __iomem *addr) { … } static inline u32 rd_reg_dword_relaxed(const volatile __le32 __iomem *addr) { … } static inline void wrt_reg_byte(volatile u8 __iomem *addr, u8 data) { … } static inline void wrt_reg_word(volatile __le16 __iomem *addr, u16 data) { … } static inline void wrt_reg_dword(volatile __le32 __iomem *addr, u32 data) { … } /* * ISP83XX specific remote register addresses */ #define QLA83XX_LED_PORT0 … #define QLA83XX_LED_PORT1 … #define QLA83XX_IDC_DEV_STATE … #define QLA83XX_IDC_MAJOR_VERSION … #define QLA83XX_IDC_MINOR_VERSION … #define QLA83XX_IDC_DRV_PRESENCE … #define QLA83XX_IDC_DRIVER_ACK … #define QLA83XX_IDC_CONTROL … #define QLA83XX_IDC_AUDIT … #define QLA83XX_IDC_LOCK_RECOVERY … #define QLA83XX_DRIVER_LOCKID … #define QLA83XX_DRIVER_LOCK … #define QLA83XX_DRIVER_UNLOCK … #define QLA83XX_FLASH_LOCKID … #define QLA83XX_FLASH_LOCK … #define QLA83XX_FLASH_UNLOCK … #define QLA83XX_DEV_PARTINFO1 … #define QLA83XX_DEV_PARTINFO2 … #define QLA83XX_FW_HEARTBEAT … #define QLA83XX_PEG_HALT_STATUS1 … #define QLA83XX_PEG_HALT_STATUS2 … /* 83XX: Macros defining 8200 AEN Reason codes */ #define IDC_DEVICE_STATE_CHANGE … #define IDC_PEG_HALT_STATUS_CHANGE … #define IDC_NIC_FW_REPORTED_FAILURE … #define IDC_HEARTBEAT_FAILURE … /* 83XX: Macros defining 8200 AEN Error-levels */ #define ERR_LEVEL_NON_FATAL … #define ERR_LEVEL_RECOVERABLE_FATAL … #define ERR_LEVEL_UNRECOVERABLE_FATAL … /* 83XX: Macros for IDC Version */ #define QLA83XX_SUPP_IDC_MAJOR_VERSION … #define QLA83XX_SUPP_IDC_MINOR_VERSION … /* 83XX: Macros for scheduling dpc tasks */ #define QLA83XX_NIC_CORE_RESET … #define QLA83XX_IDC_STATE_HANDLER … #define QLA83XX_NIC_CORE_UNRECOVERABLE … /* 83XX: Macros for defining IDC-Control bits */ #define QLA83XX_IDC_RESET_DISABLED … #define QLA83XX_IDC_GRACEFUL_RESET … /* 83XX: Macros for different timeouts */ #define QLA83XX_IDC_INITIALIZATION_TIMEOUT … #define QLA83XX_IDC_RESET_ACK_TIMEOUT … #define QLA83XX_MAX_LOCK_RECOVERY_WAIT … /* 83XX: Macros for defining class in DEV-Partition Info register */ #define QLA83XX_CLASS_TYPE_NONE … #define QLA83XX_CLASS_TYPE_NIC … #define QLA83XX_CLASS_TYPE_FCOE … #define QLA83XX_CLASS_TYPE_ISCSI … /* 83XX: Macros for IDC Lock-Recovery stages */ #define IDC_LOCK_RECOVERY_STAGE1 … #define IDC_LOCK_RECOVERY_STAGE2 … /* 83XX: Macros for IDC Audit type */ #define IDC_AUDIT_TIMESTAMP … #define IDC_AUDIT_COMPLETION … /* ISP2031: Values for laser on/off */ #define PORT_0_2031 … #define PORT_1_2031 … #define LASER_ON_2031 … #define LASER_OFF_2031 … /* * The ISP2312 v2 chip cannot access the FLASH/GPIO registers via MMIO in an * 133Mhz slot. */ #define RD_REG_WORD_PIO(addr) … #define WRT_REG_WORD_PIO(addr, data) … /* * Fibre Channel device definitions. */ #define WWN_SIZE … #define MAX_FIBRE_DEVICES_2100 … #define MAX_FIBRE_DEVICES_2400 … #define MAX_FIBRE_DEVICES_LOOP … #define MAX_FIBRE_DEVICES_MAX … #define LOOPID_MAP_SIZE … #define MAX_FIBRE_LUNS … #define MAX_HOST_COUNT … /* * Host adapter default definitions. */ #define MAX_BUSES … #define MIN_LUNS … #define MAX_LUNS … #define MAX_CMDS_PER_LUN … /* * Fibre Channel device definitions. */ #define SNS_LAST_LOOP_ID_2100 … #define SNS_LAST_LOOP_ID_2300 … #define LAST_LOCAL_LOOP_ID … #define SNS_FL_PORT … #define FABRIC_CONTROLLER … #define SIMPLE_NAME_SERVER … #define SNS_FIRST_LOOP_ID … #define MANAGEMENT_SERVER … #define BROADCAST … /* * There is no correspondence between an N-PORT id and an AL_PA. Therefore the * valid range of an N-PORT id is 0 through 0x7ef. */ #define NPH_LAST_HANDLE … #define NPH_MGMT_SERVER … #define NPH_SNS … #define NPH_FABRIC_CONTROLLER … #define NPH_F_PORT … #define NPH_IP_BROADCAST … #define NPH_SNS_LID(ha) … #define MAX_CMDSZ … #include "qla_fw.h" struct name_list_extended { … }; struct qla_nvme_fc_rjt { … }; struct els_reject { … }; /* * Timeout timer counts in seconds */ #define PORT_RETRY_TIME … #define LOOP_DOWN_TIMEOUT … #define LOOP_DOWN_TIME … #define LOOP_DOWN_RESET … #define DEFAULT_OUTSTANDING_COMMANDS … #define MIN_OUTSTANDING_COMMANDS … /* ISP request and response entry counts (37-65535) */ #define REQUEST_ENTRY_CNT_2100 … #define REQUEST_ENTRY_CNT_2200 … #define REQUEST_ENTRY_CNT_24XX … #define REQUEST_ENTRY_CNT_83XX … #define RESPONSE_ENTRY_CNT_83XX … #define RESPONSE_ENTRY_CNT_2100 … #define RESPONSE_ENTRY_CNT_2300 … #define RESPONSE_ENTRY_CNT_MQ … #define ATIO_ENTRY_CNT_24XX … #define RESPONSE_ENTRY_CNT_FX00 … #define FW_DEF_EXCHANGES_CNT … #define FW_MAX_EXCHANGES_CNT … #define REDUCE_EXCHANGES_CNT … #define SET_DID_STATUS(stat_var, status) … struct req_que; struct qla_tgt_sess; struct qla_buf_dsc { … }; /* * SCSI Request Block */ struct srb_cmd { … }; /* * SRB flag definitions */ #define SRB_DMA_VALID … #define SRB_GOT_BUF … #define SRB_FCP_CMND_DMA_VALID … #define SRB_CRC_CTX_DMA_VALID … #define SRB_CRC_PROT_DMA_VALID … #define SRB_CRC_CTX_DSD_VALID … #define SRB_WAKEUP_ON_COMP … #define SRB_DIF_BUNDL_DMA_VALID … #define SRB_EDIF_CLEANUP_DELETE … /* To identify if a srb is of T10-CRC type. @sp => srb_t pointer */ #define IS_PROT_IO(sp) … #define ISP_REG16_DISCONNECT … static inline le_id_t be_id_to_le(be_id_t id) { … } static inline be_id_t le_id_to_be(le_id_t id) { … } static inline port_id_t be_to_port_id(be_id_t id) { … } static inline be_id_t port_id_to_be_id(port_id_t port_id) { … } struct tmf_arg { … }; struct els_logo_payload { … }; struct els_plogi_payload { … }; struct ct_arg { … }; struct qla_nvme_lsrjt_pt_arg { … }; /* * SRB extensions. */ struct srb_iocb { … }; /* Values for srb_ctx type */ #define SRB_LOGIN_CMD … #define SRB_LOGOUT_CMD … #define SRB_ELS_CMD_RPT … #define SRB_ELS_CMD_HST … #define SRB_CT_CMD … #define SRB_ADISC_CMD … #define SRB_TM_CMD … #define SRB_SCSI_CMD … #define SRB_BIDI_CMD … #define SRB_FXIOCB_DCMD … #define SRB_FXIOCB_BCMD … #define SRB_ABT_CMD … #define SRB_ELS_DCMD … #define SRB_MB_IOCB … #define SRB_CT_PTHRU_CMD … #define SRB_NACK_PLOGI … #define SRB_NACK_PRLI … #define SRB_NACK_LOGO … #define SRB_NVME_CMD … #define SRB_NVME_LS … #define SRB_PRLI_CMD … #define SRB_CTRL_VP … #define SRB_PRLO_CMD … #define SRB_SA_UPDATE … #define SRB_ELS_CMD_HST_NOLOGIN … #define SRB_SA_REPLACE … #define SRB_MARKER … struct qla_els_pt_arg { … }; enum { … }; struct iocb_resource { … }; struct bsg_cmd { … }; srb_t; #define GET_CMD_SP(sp) … #define GET_CMD_SENSE_LEN(sp) … #define SET_CMD_SENSE_LEN(sp, len) … #define GET_CMD_SENSE_PTR(sp) … #define SET_CMD_SENSE_PTR(sp, ptr) … #define GET_FW_SENSE_LEN(sp) … #define SET_FW_SENSE_LEN(sp, len) … struct msg_echo_lb { … }; /* * ISP I/O Register Set structure definitions. */ struct device_reg_2xxx { … }; struct device_reg_25xxmq { … }; struct device_reg_fx00 { … }; device_reg_t; #define ISP_REQ_Q_IN(ha, reg) … #define ISP_REQ_Q_OUT(ha, reg) … #define ISP_RSP_Q_IN(ha, reg) … #define ISP_RSP_Q_OUT(ha, reg) … #define ISP_ATIO_Q_IN(vha) … #define ISP_ATIO_Q_OUT(vha) … #define MAILBOX_REG(ha, reg, num) … #define RD_MAILBOX_REG(ha, reg, num) … #define WRT_MAILBOX_REG(ha, reg, num, data) … #define FB_CMD_REG(ha, reg) … #define RD_FB_CMD_REG(ha, reg) … #define WRT_FB_CMD_REG(ha, reg, data) … mbx_cmd_t; struct mbx_cmd_32 { … }; #define MBX_TOV_SECONDS … /* * ISP product identification definitions in mailboxes after reset. */ #define PROD_ID_1 … #define PROD_ID_2 … #define PROD_ID_2a … #define PROD_ID_3 … /* * ISP mailbox Self-Test status codes */ #define MBS_FRM_ALIVE … #define MBS_CHKSUM_ERR … #define MBS_BUSY … /* * ISP mailbox command complete status codes */ #define MBS_COMMAND_COMPLETE … #define MBS_INVALID_COMMAND … #define MBS_HOST_INTERFACE_ERROR … #define MBS_TEST_FAILED … #define MBS_COMMAND_ERROR … #define MBS_COMMAND_PARAMETER_ERROR … #define MBS_PORT_ID_USED … #define MBS_LOOP_ID_USED … #define MBS_ALL_IDS_IN_USE … #define MBS_NOT_LOGGED_IN … #define MBS_LINK_DOWN_ERROR … #define MBS_DIAG_ECHO_TEST_ERROR … static inline bool qla2xxx_is_valid_mbs(unsigned int mbs) { … } /* * ISP mailbox asynchronous event status codes */ #define MBA_ASYNC_EVENT … #define MBA_RESET … #define MBA_SYSTEM_ERR … #define MBA_REQ_TRANSFER_ERR … #define MBA_RSP_TRANSFER_ERR … #define MBA_WAKEUP_THRES … #define MBA_LIP_OCCURRED … /* occurred. */ #define MBA_LOOP_UP … #define MBA_LOOP_DOWN … #define MBA_LIP_RESET … #define MBA_PORT_UPDATE … #define MBA_RSCN_UPDATE … #define MBA_LIP_F8 … #define MBA_LOOP_INIT_ERR … #define MBA_FABRIC_AUTH_REQ … #define MBA_CONGN_NOTI_RECV … #define MBA_SCSI_COMPLETION … #define MBA_CTIO_COMPLETION … #define MBA_IP_COMPLETION … #define MBA_IP_RECEIVE … #define MBA_IP_BROADCAST … #define MBA_IP_LOW_WATER_MARK … #define MBA_IP_RCV_BUFFER_EMPTY … #define MBA_IP_HDR_DATA_SPLIT … /* used. */ #define MBA_TRACE_NOTIFICATION … #define MBA_POINT_TO_POINT … #define MBA_CMPLT_1_16BIT … #define MBA_CMPLT_2_16BIT … #define MBA_CMPLT_3_16BIT … #define MBA_CMPLT_4_16BIT … #define MBA_CMPLT_5_16BIT … #define MBA_CHG_IN_CONNECTION … #define MBA_RIO_RESPONSE … #define MBA_ZIO_RESPONSE … #define MBA_CMPLT_2_32BIT … #define MBA_BYPASS_NOTIFICATION … #define MBA_DISCARD_RND_FRAME … #define MBA_REJECTED_FCP_CMD … #define MBA_FW_NOT_STARTED … #define MBA_FW_STARTING … #define MBA_FW_RESTART_CMPLT … #define MBA_INIT_REQUIRED … #define MBA_SHUTDOWN_REQUESTED … #define MBA_TEMPERATURE_ALERT … #define MBA_DPORT_DIAGNOSTICS … #define MBA_TRANS_INSERT … #define MBA_TRANS_REMOVE … #define MBA_FW_INIT_FAILURE … #define MBA_MIRROR_LUN_CHANGE … #define MBA_FW_POLL_STATE … #define MBA_FW_RESET_FCT … #define MBA_FW_INIT_INPROGRESS … /* 83XX FCoE specific */ #define MBA_IDC_AEN … /* Interrupt type codes */ #define INTR_ROM_MB_SUCCESS … #define INTR_ROM_MB_FAILED … #define INTR_MB_SUCCESS … #define INTR_MB_FAILED … #define INTR_ASYNC_EVENT … #define INTR_RSP_QUE_UPDATE … #define INTR_RSP_QUE_UPDATE_83XX … #define INTR_ATIO_QUE_UPDATE … #define INTR_ATIO_RSP_QUE_UPDATE … #define INTR_ATIO_QUE_UPDATE_27XX … /* ISP mailbox loopback echo diagnostic error code */ #define MBS_LB_RESET … /* AEN mailbox Port Diagnostics test */ #define AEN_START_DIAG_TEST … #define AEN_DONE_DIAG_TEST_WITH_NOERR … #define AEN_DONE_DIAG_TEST_WITH_ERR … /* * Firmware options 1, 2, 3. */ #define FO1_AE_ON_LIPF8 … #define FO1_AE_ALL_LIP_RESET … #define FO1_CTIO_RETRY … #define FO1_DISABLE_LIP_F7_SW … #define FO1_DISABLE_100MS_LOS_WAIT … #define FO1_DISABLE_GPIO6_7 … #define FO1_AE_ON_LOOP_INIT_ERR … #define FO1_SET_EMPHASIS_SWING … #define FO1_AE_AUTO_BYPASS … #define FO1_ENABLE_PURE_IOCB … #define FO1_AE_PLOGI_RJT … #define FO1_ENABLE_ABORT_SEQUENCE … #define FO1_AE_QUEUE_FULL … #define FO2_ENABLE_ATIO_TYPE_3 … #define FO2_REV_LOOPBACK … #define FO3_ENABLE_EMERG_IOCB … #define FO3_AE_RND_ERROR … /* 24XX additional firmware options */ #define ADD_FO_COUNT … #define ADD_FO1_DISABLE_GPIO_LED_CTRL … #define ADD_FO1_ENABLE_PUREX_IOCB … #define ADD_FO2_ENABLE_SEL_CLS2 … #define ADD_FO3_NO_ABT_ON_LINK_DOWN … /* * ISP mailbox commands */ #define MBC_LOAD_RAM … #define MBC_EXECUTE_FIRMWARE … #define MBC_READ_RAM_WORD … #define MBC_MAILBOX_REGISTER_TEST … #define MBC_VERIFY_CHECKSUM … #define MBC_GET_FIRMWARE_VERSION … #define MBC_LOAD_RISC_RAM … #define MBC_DUMP_RISC_RAM … #define MBC_SECURE_FLASH_UPDATE … #define MBC_LOAD_RISC_RAM_EXTENDED … #define MBC_DUMP_RISC_RAM_EXTENDED … #define MBC_WRITE_RAM_WORD_EXTENDED … #define MBC_READ_RAM_EXTENDED … #define MBC_IOCB_COMMAND … #define MBC_STOP_FIRMWARE … #define MBC_ABORT_COMMAND … #define MBC_ABORT_DEVICE … #define MBC_ABORT_TARGET … #define MBC_RESET … #define MBC_GET_ADAPTER_LOOP_ID … #define MBC_GET_SET_ZIO_THRESHOLD … #define MBC_GET_RETRY_COUNT … #define MBC_DISABLE_VI … #define MBC_ENABLE_VI … #define MBC_GET_FIRMWARE_OPTION … #define MBC_GET_MEM_OFFLOAD_CNTRL_STAT … #define MBC_SET_FIRMWARE_OPTION … #define MBC_SET_GET_FC_LED_CONFIG … #define MBC_LOOP_PORT_BYPASS … #define MBC_LOOP_PORT_ENABLE … #define MBC_GET_RESOURCE_COUNTS … #define MBC_NON_PARTICIPATE … #define MBC_DIAGNOSTIC_ECHO … #define MBC_DIAGNOSTIC_LOOP_BACK … #define MBC_ONLINE_SELF_TEST … #define MBC_ENHANCED_GET_PORT_DATABASE … #define MBC_CONFIGURE_VF … #define MBC_RESET_LINK_STATUS … #define MBC_IOCB_COMMAND_A64 … #define MBC_PORT_LOGOUT … #define MBC_SEND_RNID_ELS … #define MBC_SET_RNID_PARAMS … #define MBC_GET_RNID_PARAMS … #define MBC_DATA_RATE … #define MBC_INITIALIZE_FIRMWARE … #define MBC_INITIATE_LIP … /* Initialization Procedure */ #define MBC_GET_FC_AL_POSITION_MAP … #define MBC_GET_PORT_DATABASE … #define MBC_CLEAR_ACA … #define MBC_TARGET_RESET … #define MBC_CLEAR_TASK_SET … #define MBC_ABORT_TASK_SET … #define MBC_GET_FIRMWARE_STATE … #define MBC_GET_PORT_NAME … #define MBC_GET_LINK_STATUS … #define MBC_LIP_RESET … #define MBC_SEND_SNS_COMMAND … /* commandd. */ #define MBC_LOGIN_FABRIC_PORT … #define MBC_SEND_CHANGE_REQUEST … #define MBC_LOGOUT_FABRIC_PORT … #define MBC_LIP_FULL_LOGIN … #define MBC_LOGIN_LOOP_PORT … #define MBC_PORT_NODE_NAME_LIST … #define MBC_INITIALIZE_RECEIVE_QUEUE … #define MBC_UNLOAD_IP … #define MBC_GET_ID_LIST … #define MBC_SEND_LFA_COMMAND … #define MBC_LUN_RESET … /* * all the Mt. Rainier mailbox command codes that clash with FC/FCoE ones * should be defined with MBC_MR_* */ #define MBC_MR_DRV_SHUTDOWN … /* * ISP24xx mailbox commands */ #define MBC_WRITE_SERDES … #define MBC_READ_SERDES … #define MBC_LOAD_DUMP_MPI_RAM … #define MBC_SERDES_PARAMS … #define MBC_GET_IOCB_STATUS … #define MBC_PORT_PARAMS … #define MBC_GET_TIMEOUT_PARAMS … #define MBC_TRACE_CONTROL … #define MBC_GEN_SYSTEM_ERROR … #define MBC_WRITE_SFP … #define MBC_READ_SFP … #define MBC_SET_TIMEOUT_PARAMS … #define MBC_DPORT_DIAGNOSTICS … #define MBC_MID_INITIALIZE_FIRMWARE … #define MBC_MID_GET_VP_DATABASE … #define MBC_MID_GET_VP_ENTRY … #define MBC_HOST_MEMORY_COPY … #define MBC_SEND_RNFT_ELS … #define MBC_GET_LINK_PRIV_STATS … #define MBC_LINK_INITIALIZATION … #define MBC_SET_VENDOR_ID … #define MBC_PORT_RESET … #define MBC_SET_PORT_CONFIG … #define MBC_GET_PORT_CONFIG … /* * ISP81xx mailbox commands */ #define MBC_WRITE_MPI_REGISTER … /* * ISP8044 mailbox commands */ #define MBC_SET_GET_ETH_SERDES_REG … #define HCS_WRITE_SERDES … #define HCS_READ_SERDES … /* Firmware return data sizes */ #define FCAL_MAP_SIZE … /* Mailbox bit definitions for out_mb and in_mb */ #define MBX_31 … #define MBX_30 … #define MBX_29 … #define MBX_28 … #define MBX_27 … #define MBX_26 … #define MBX_25 … #define MBX_24 … #define MBX_23 … #define MBX_22 … #define MBX_21 … #define MBX_20 … #define MBX_19 … #define MBX_18 … #define MBX_17 … #define MBX_16 … #define MBX_15 … #define MBX_14 … #define MBX_13 … #define MBX_12 … #define MBX_11 … #define MBX_10 … #define MBX_9 … #define MBX_8 … #define MBX_7 … #define MBX_6 … #define MBX_5 … #define MBX_4 … #define MBX_3 … #define MBX_2 … #define MBX_1 … #define MBX_0 … #define RNID_TYPE_ELS_CMD … #define RNID_TYPE_PORT_LOGIN … #define RNID_BUFFER_CREDITS … #define RNID_TYPE_SET_VERSION … #define RNID_TYPE_ASIC_TEMP … #define ELS_CMD_MAP_SIZE … /* * Firmware state codes from get firmware state mailbox command */ #define FSTATE_CONFIG_WAIT … #define FSTATE_WAIT_AL_PA … #define FSTATE_WAIT_LOGIN … #define FSTATE_READY … #define FSTATE_LOSS_OF_SYNC … #define FSTATE_ERROR … #define FSTATE_REINIT … #define FSTATE_NON_PART … #define FSTATE_CONFIG_CORRECT … #define FSTATE_P2P_RCV_LIP … #define FSTATE_P2P_CHOOSE_LOOP … #define FSTATE_P2P_RCV_UNIDEN_LIP … #define FSTATE_FATAL_ERROR … #define FSTATE_LOOP_BACK_CONN … #define QLA27XX_IMG_STATUS_VER_MAJOR … #define QLA27XX_IMG_STATUS_VER_MINOR … #define QLA27XX_IMG_STATUS_SIGN … #define QLA28XX_IMG_STATUS_SIGN … #define QLA28XX_IMG_STATUS_SIGN … #define QLA28XX_AUX_IMG_STATUS_SIGN … #define QLA27XX_DEFAULT_IMAGE … #define QLA27XX_PRIMARY_IMAGE … #define QLA27XX_SECONDARY_IMAGE … /* * Port Database structure definition * Little endian except where noted. */ #define PORT_DATABASE_SIZE … port_database_t; /* * Port database slave/master states */ #define PD_STATE_DISCOVERY … #define PD_STATE_WAIT_DISCOVERY_ACK … #define PD_STATE_PORT_LOGIN … #define PD_STATE_WAIT_PORT_LOGIN_ACK … #define PD_STATE_PROCESS_LOGIN … #define PD_STATE_WAIT_PROCESS_LOGIN_ACK … #define PD_STATE_PORT_LOGGED_IN … #define PD_STATE_PORT_UNAVAILABLE … #define PD_STATE_PROCESS_LOGOUT … #define PD_STATE_WAIT_PROCESS_LOGOUT_ACK … #define PD_STATE_PORT_LOGOUT … #define PD_STATE_WAIT_PORT_LOGOUT_ACK … #define QLA_ZIO_MODE_6 … #define QLA_ZIO_DISABLED … #define QLA_ZIO_DEFAULT_TIMER … /* * ISP Initialization Control Block. * Little endian except where noted. */ #define ICB_VERSION … init_cb_t; /* Special Features Control Block */ struct init_sf_cb { … }; /* * Get Link Status mailbox command return buffer. */ #define GLSO_SEND_RPS … #define GLSO_USE_DID … struct link_statistics { … }; /* * NVRAM Command values. */ #define NV_START_BIT … #define NV_WRITE_OP … #define NV_READ_OP … #define NV_ERASE_OP … #define NV_MASK_OP … #define NV_DELAY_COUNT … /* * QLogic ISP2100, ISP2200 and ISP2300 NVRAM structure definition. */ nvram_t; /* * ISP queue - response queue entry definition. */ response_t; /* * ISP queue - ATIO queue entry definition. */ struct atio { … }; target_id_t; #define SET_TARGET_ID(ha, to, from) … /* * ISP queue - command entry structure definition. */ #define COMMAND_TYPE … cmd_entry_t; /* * ISP queue - 64-Bit addressing, command entry structure definition. */ #define COMMAND_A64_TYPE … request_t; /* * ISP queue - continuation entry structure definition. */ #define CONTINUE_TYPE … cont_entry_t; /* * ISP queue - 64-Bit addressing, continuation entry structure definition. */ #define CONTINUE_A64_TYPE … cont_a64_entry_t; #define PO_MODE_DIF_INSERT … #define PO_MODE_DIF_REMOVE … #define PO_MODE_DIF_PASS … #define PO_MODE_DIF_REPLACE … #define PO_MODE_DIF_TCP_CKSUM … #define PO_ENABLE_INCR_GUARD_SEED … #define PO_DISABLE_GUARD_CHECK … #define PO_DISABLE_INCR_REF_TAG … #define PO_DIS_HEADER_MODE … #define PO_ENABLE_DIF_BUNDLING … #define PO_DIS_FRAME_MODE … #define PO_DIS_VALD_APP_ESC … #define PO_DIS_VALD_APP_REF_ESC … #define PO_DIS_APP_TAG_REPL … #define PO_DIS_REF_TAG_REPL … #define PO_DIS_APP_TAG_VALD … #define PO_DIS_REF_TAG_VALD … /* * ISP queue - 64-Bit addressing, continuation crc entry structure definition. */ struct crc_context { … }; #define CRC_CONTEXT_LEN_FW … #define CRC_CONTEXT_FCPCMND_OFF … /* * ISP queue - status entry structure definition. */ #define STATUS_TYPE … sts_entry_t; /* * Status entry entry status */ #define RF_RQ_DMA_ERROR … #define RF_INV_E_ORDER … #define RF_INV_E_COUNT … #define RF_INV_E_PARAM … #define RF_INV_E_TYPE … #define RF_BUSY … #define RF_MASK … #define RF_MASK_24XX … /* * Status entry SCSI status bit definitions. */ #define SS_MASK … #define SS_RESIDUAL_UNDER … #define SS_RESIDUAL_OVER … #define SS_SENSE_LEN_VALID … #define SS_RESPONSE_INFO_LEN_VALID … #define SS_SCSI_STATUS_BYTE … #define SS_RESERVE_CONFLICT … #define SS_BUSY_CONDITION … #define SS_CONDITION_MET … #define SS_CHECK_CONDITION … /* * Status entry completion status */ #define CS_COMPLETE … #define CS_INCOMPLETE … #define CS_DMA … #define CS_TRANSPORT … #define CS_RESET … #define CS_ABORTED … #define CS_TIMEOUT … #define CS_DATA_OVERRUN … #define CS_DIF_ERROR … #define CS_DATA_UNDERRUN … #define CS_QUEUE_FULL … #define CS_PORT_UNAVAILABLE … /* (selection timeout) */ #define CS_PORT_LOGGED_OUT … #define CS_PORT_CONFIG_CHG … #define CS_PORT_BUSY … #define CS_COMPLETE_CHKCOND … #define CS_IOCB_ERROR … #define CS_REJECT_RECEIVED … #define CS_EDIF_AUTH_ERROR … #define CS_EDIF_PAD_LEN_ERROR … #define CS_EDIF_INV_REQ … #define CS_EDIF_SPI_ERROR … #define CS_EDIF_HDR_ERROR … #define CS_BAD_PAYLOAD … #define CS_UNKNOWN … #define CS_RETRY … #define CS_LOOP_DOWN_ABORT … #define CS_BIDIR_RD_OVERRUN … #define CS_BIDIR_RD_WR_OVERRUN … #define CS_BIDIR_RD_OVERRUN_WR_UNDERRUN … #define CS_BIDIR_RD_UNDERRUN … #define CS_BIDIR_RD_UNDERRUN_WR_OVERRUN … #define CS_BIDIR_RD_WR_UNDERRUN … #define CS_BIDIR_DMA … /* * Status entry status flags */ #define SF_ABTS_TERMINATED … #define SF_LOGOUT_SENT … /* * ISP queue - status continuation entry structure definition. */ #define STATUS_CONT_TYPE … sts_cont_entry_t; /* * ISP queue - RIO Type 1 status entry (32 bit I/O entry handles) * structure definition. */ #define STATUS_TYPE_21 … sts21_entry_t; /* * ISP queue - RIO Type 2 status entry (16 bit I/O entry handles) * structure definition. */ #define STATUS_TYPE_22 … sts22_entry_t; /* * ISP queue - marker entry structure definition. */ #define MARKER_TYPE … mrk_entry_t; /* * ISP queue - Management Server entry structure definition. */ #define MS_IOCB_TYPE … ms_iocb_entry_t; #define SCM_EDC_ACC_RECEIVED … #define SCM_RDF_ACC_RECEIVED … /* * ISP queue - Mailbox Command entry structure definition. */ #define MBX_IOCB_TYPE … struct mbx_entry { … }; #ifndef IMMED_NOTIFY_TYPE #define IMMED_NOTIFY_TYPE … /* * ISP queue - immediate notify entry structure definition. * This is sent by the ISP to the Target driver. * This IOCB would have report of events sent by the * initiator, that needs to be handled by the target * driver immediately. */ struct imm_ntfy_from_isp { … } __packed; #endif /* * ISP request and response queue entry sizes */ #define RESPONSE_ENTRY_SIZE … #define REQUEST_ENTRY_SIZE … /* * Switch info gathering structure. */ sw_info_t; /* FCP-4 types */ #define FC4_TYPE_FCP_SCSI … #define FC4_TYPE_NVME … #define FC4_TYPE_OTHER … #define FC4_TYPE_UNKNOWN … /* mailbox command 4G & above */ struct mbx_24xx_entry { … }; #define IOCB_SIZE … /* * Fibre channel port type. */ fc_port_type_t; enum qla_sess_deletion { … }; enum qlt_plogi_link_t { … }; struct qlt_plogi_ack_t { … }; struct ct_sns_desc { … }; enum discovery_state { … }; enum login_state { … }; enum rscn_addr_format { … }; /* * Fibre channel port structure. */ fc_port_t; enum { … }; #define QLA_FCPORT_SCAN … #define QLA_FCPORT_FOUND … struct event_arg { … }; #include "qla_mr.h" /* * Fibre channel port/lun states. */ enum { … }; extern const char *const port_state_str[5]; static const char *const port_dstate_str[] = …; /* * FC port flags. */ #define FCF_FABRIC_DEVICE … #define FCF_LOGIN_NEEDED … #define FCF_FCP2_DEVICE … #define FCF_ASYNC_SENT … #define FCF_CONF_COMP_SUPPORTED … #define FCF_ASYNC_ACTIVE … #define FCF_FCSP_DEVICE … #define FCF_EDIF_DELETE … /* No loop ID flag. */ #define FC_NO_LOOP_ID … /* * FC-CT interface * * NOTE: All structures are big-endian in form. */ #define CT_REJECT_RESPONSE … #define CT_ACCEPT_RESPONSE … #define CT_REASON_INVALID_COMMAND_CODE … #define CT_REASON_CANNOT_PERFORM … #define CT_REASON_COMMAND_UNSUPPORTED … #define CT_EXPL_ALREADY_REGISTERED … #define CT_EXPL_HBA_ATTR_NOT_REGISTERED … #define CT_EXPL_MULTIPLE_HBA_ATTR … #define CT_EXPL_INVALID_HBA_BLOCK_LENGTH … #define CT_EXPL_MISSING_REQ_HBA_ATTR … #define CT_EXPL_PORT_NOT_REGISTERED_ … #define CT_EXPL_MISSING_HBA_ID_PORT_LIST … #define CT_EXPL_HBA_NOT_REGISTERED … #define CT_EXPL_PORT_ATTR_NOT_REGISTERED … #define CT_EXPL_PORT_NOT_REGISTERED … #define CT_EXPL_MULTIPLE_PORT_ATTR … #define CT_EXPL_INVALID_PORT_BLOCK_LENGTH … #define NS_N_PORT_TYPE … #define NS_NL_PORT_TYPE … #define NS_NX_PORT_TYPE … #define GA_NXT_CMD … #define GA_NXT_REQ_SIZE … #define GA_NXT_RSP_SIZE … #define GPN_FT_CMD … #define GPN_FT_REQ_SIZE … #define GNN_FT_CMD … #define GNN_FT_REQ_SIZE … #define GID_PT_CMD … #define GID_PT_REQ_SIZE … #define GPN_ID_CMD … #define GPN_ID_REQ_SIZE … #define GPN_ID_RSP_SIZE … #define GNN_ID_CMD … #define GNN_ID_REQ_SIZE … #define GNN_ID_RSP_SIZE … #define GFT_ID_CMD … #define GFT_ID_REQ_SIZE … #define GFT_ID_RSP_SIZE … #define GID_PN_CMD … #define GID_PN_REQ_SIZE … #define GID_PN_RSP_SIZE … #define RFT_ID_CMD … #define RFT_ID_REQ_SIZE … #define RFT_ID_RSP_SIZE … #define RFF_ID_CMD … #define RFF_ID_REQ_SIZE … #define RFF_ID_RSP_SIZE … #define RNN_ID_CMD … #define RNN_ID_REQ_SIZE … #define RNN_ID_RSP_SIZE … #define RSNN_NN_CMD … #define RSNN_NN_REQ_SIZE … #define RSNN_NN_RSP_SIZE … #define GFPN_ID_CMD … #define GFPN_ID_REQ_SIZE … #define GFPN_ID_RSP_SIZE … #define GPSC_CMD … #define GPSC_REQ_SIZE … #define GPSC_RSP_SIZE … #define GFF_ID_CMD … #define GFF_ID_REQ_SIZE … #define GFF_ID_RSP_SIZE … /* * FDMI HBA attribute types. */ #define FDMI1_HBA_ATTR_COUNT … #define FDMI2_HBA_ATTR_COUNT … #define FDMI_HBA_NODE_NAME … #define FDMI_HBA_MANUFACTURER … #define FDMI_HBA_SERIAL_NUMBER … #define FDMI_HBA_MODEL … #define FDMI_HBA_MODEL_DESCRIPTION … #define FDMI_HBA_HARDWARE_VERSION … #define FDMI_HBA_DRIVER_VERSION … #define FDMI_HBA_OPTION_ROM_VERSION … #define FDMI_HBA_FIRMWARE_VERSION … #define FDMI_HBA_OS_NAME_AND_VERSION … #define FDMI_HBA_MAXIMUM_CT_PAYLOAD_LENGTH … #define FDMI_HBA_NODE_SYMBOLIC_NAME … #define FDMI_HBA_VENDOR_SPECIFIC_INFO … #define FDMI_HBA_NUM_PORTS … #define FDMI_HBA_FABRIC_NAME … #define FDMI_HBA_BOOT_BIOS_NAME … #define FDMI_HBA_VENDOR_IDENTIFIER … struct ct_fdmi_hba_attr { … }; struct ct_fdmi1_hba_attributes { … }; struct ct_fdmi2_hba_attributes { … }; /* * FDMI Port attribute types. */ #define FDMI1_PORT_ATTR_COUNT … #define FDMI2_PORT_ATTR_COUNT … #define FDMI2_SMARTSAN_PORT_ATTR_COUNT … #define FDMI_PORT_FC4_TYPES … #define FDMI_PORT_SUPPORT_SPEED … #define FDMI_PORT_CURRENT_SPEED … #define FDMI_PORT_MAX_FRAME_SIZE … #define FDMI_PORT_OS_DEVICE_NAME … #define FDMI_PORT_HOST_NAME … #define FDMI_PORT_NODE_NAME … #define FDMI_PORT_NAME … #define FDMI_PORT_SYM_NAME … #define FDMI_PORT_TYPE … #define FDMI_PORT_SUPP_COS … #define FDMI_PORT_FABRIC_NAME … #define FDMI_PORT_FC4_TYPE … #define FDMI_PORT_STATE … #define FDMI_PORT_COUNT … #define FDMI_PORT_IDENTIFIER … #define FDMI_SMARTSAN_SERVICE … #define FDMI_SMARTSAN_GUID … #define FDMI_SMARTSAN_VERSION … #define FDMI_SMARTSAN_PROD_NAME … #define FDMI_SMARTSAN_PORT_INFO … #define FDMI_SMARTSAN_QOS_SUPPORT … #define FDMI_SMARTSAN_SECURITY_SUPPORT … #define FDMI_PORT_SPEED_1GB … #define FDMI_PORT_SPEED_2GB … #define FDMI_PORT_SPEED_10GB … #define FDMI_PORT_SPEED_4GB … #define FDMI_PORT_SPEED_8GB … #define FDMI_PORT_SPEED_16GB … #define FDMI_PORT_SPEED_32GB … #define FDMI_PORT_SPEED_20GB … #define FDMI_PORT_SPEED_40GB … #define FDMI_PORT_SPEED_128GB … #define FDMI_PORT_SPEED_64GB … #define FDMI_PORT_SPEED_256GB … #define FDMI_PORT_SPEED_UNKNOWN … #define FC_CLASS_2 … #define FC_CLASS_3 … #define FC_CLASS_2_3 … struct ct_fdmi_port_attr { … }; struct ct_fdmi1_port_attributes { … }; struct ct_fdmi2_port_attributes { … }; #define FDMI_ATTR_TYPELEN(obj) … #define FDMI_ATTR_ALIGNMENT(len) … /* FDMI register call options */ #define CALLOPT_FDMI1 … #define CALLOPT_FDMI2 … #define CALLOPT_FDMI2_SMARTSAN … /* FDMI definitions. */ #define GRHL_CMD … #define GHAT_CMD … #define GRPL_CMD … #define GPAT_CMD … #define RHBA_CMD … #define RHBA_RSP_SIZE … #define RHAT_CMD … #define RPRT_CMD … #define RPRT_RSP_SIZE … #define RPA_CMD … #define RPA_RSP_SIZE … #define SMARTSAN_RPA_RSP_SIZE … #define DHBA_CMD … #define DHBA_REQ_SIZE … #define DHBA_RSP_SIZE … #define DHAT_CMD … #define DPRT_CMD … #define DPA_CMD … /* CT command header -- request/response common fields */ struct ct_cmd_hdr { … }; /* CT command request */ struct ct_sns_req { … }; /* CT command response header */ struct ct_rsp_hdr { … }; struct ct_sns_gid_pt_data { … }; /* It's the same for both GPN_FT and GNN_FT */ struct ct_sns_gpnft_rsp { … }; /* CT command response */ struct ct_sns_rsp { … }; struct ct_sns_pkt { … }; struct ct_sns_gpnft_pkt { … }; enum scan_flags_t { … }; enum fc4type_t { … }; struct fab_scan_rp { … }; enum scan_step { … }; struct fab_scan { … }; /* * SNS command structures -- for 2200 compatibility. */ #define RFT_ID_SNS_SCMD_LEN … #define RFT_ID_SNS_CMD_SIZE … #define RFT_ID_SNS_DATA_SIZE … #define RNN_ID_SNS_SCMD_LEN … #define RNN_ID_SNS_CMD_SIZE … #define RNN_ID_SNS_DATA_SIZE … #define GA_NXT_SNS_SCMD_LEN … #define GA_NXT_SNS_CMD_SIZE … #define GA_NXT_SNS_DATA_SIZE … #define GID_PT_SNS_SCMD_LEN … #define GID_PT_SNS_CMD_SIZE … /* * Assume MAX_FIBRE_DEVICES_2100 as these defines are only used with older * adapters. */ #define GID_PT_SNS_DATA_SIZE … #define GPN_ID_SNS_SCMD_LEN … #define GPN_ID_SNS_CMD_SIZE … #define GPN_ID_SNS_DATA_SIZE … #define GNN_ID_SNS_SCMD_LEN … #define GNN_ID_SNS_CMD_SIZE … #define GNN_ID_SNS_DATA_SIZE … struct sns_cmd_pkt { … }; struct fw_blob { … }; /* Return data from MBC_GET_ID_LIST call. */ struct gid_list_info { … }; /* NPIV */ vport_info_t; vport_params_t; /* NPIV - return codes of VP create and modify */ #define VP_RET_CODE_OK … #define VP_RET_CODE_FATAL … #define VP_RET_CODE_WRONG_ID … #define VP_RET_CODE_WWPN … #define VP_RET_CODE_RESOURCES … #define VP_RET_CODE_NO_MEM … #define VP_RET_CODE_NOT_FOUND … struct qla_hw_data; struct rsp_que; /* * ISP operations */ struct isp_operations { … }; /* MSI-X Support *************************************************************/ #define QLA_MSIX_CHIP_REV_24XX … #define QLA_MSIX_FW_MODE(m) … #define QLA_MSIX_FW_MODE_1(m) … #define QLA_BASE_VECTORS … #define QLA_MSIX_RSP_Q … #define QLA_ATIO_VECTOR … #define QLA_MSIX_QPAIR_MULTIQ_RSP_Q … #define QLA_MSIX_QPAIR_MULTIQ_RSP_Q_HS … #define QLA_MIDX_DEFAULT … #define QLA_MIDX_RSP_Q … #define QLA_PCI_MSIX_CONTROL … #define QLA_83XX_PCI_MSIX_CONTROL … struct scsi_qla_host; #define QLA83XX_RSPQ_MSIX_ENTRY_NUMBER … struct qla_msix_entry { … }; #define WATCH_INTERVAL … /* Work events. */ enum qla_work_type { … }; struct qla_work_evt { … }; struct qla_chip_state_84xx { … }; struct qla_dif_statistics { … }; struct qla_statistics { … }; struct bidi_statistics { … }; struct qla_tc_param { … }; /* Multi queue support */ #define MBC_INITIALIZE_MULTIQ … #define QLA_QUE_PAGE … #define QLA_MQ_SIZE … #define QLA_MAX_QUEUES … #define ISP_QUE_REG(ha, id) … #define QLA_REQ_QUE_ID(tag) … #define QLA_DEFAULT_QUE_QOS … #define QLA_PRECONFIG_VPORTS … #define QLA_MAX_VPORTS_QLA24XX … #define QLA_MAX_VPORTS_QLA25XX … struct qla_tgt_counters { … }; struct qla_counters { … }; struct qla_qpair; /* Response queue data structure */ struct rsp_que { … }; /* Request queue data structure */ struct req_que { … }; struct qla_fw_resources { … }; struct qla_fw_res { … }; #define QLA_IOCB_PCT_LIMIT … struct qla_buf_pool { … }; /*Queue pair data structure */ struct qla_qpair { … }; /* Place holder for FW buffer parameters */ struct qlfc_fw { … }; struct rdp_req_payload { … }; struct rdp_rsp_payload { … }; #define RDP_DESC_LEN(obj) … #define RDP_PORT_SPEED_1GB … #define RDP_PORT_SPEED_2GB … #define RDP_PORT_SPEED_4GB … #define RDP_PORT_SPEED_10GB … #define RDP_PORT_SPEED_8GB … #define RDP_PORT_SPEED_16GB … #define RDP_PORT_SPEED_32GB … #define RDP_PORT_SPEED_64GB … #define RDP_PORT_SPEED_UNKNOWN … struct scsi_qlt_host { … }; struct qlt_hw_data { … }; #define MAX_QFULL_CMDS_ALLOC … #define Q_FULL_THRESH_HOLD_PERCENT … #define Q_FULL_THRESH_HOLD(ha) … #define LEAK_EXCHG_THRESH_HOLD_PERCENT … struct qla_hw_data_stat { … }; /* refer to pcie_do_recovery reference */ pci_error_state_t; /* * Qlogic host adapter specific data structure. */ struct qla_hw_data { … }; #define RX_ELS_SIZE … struct active_regions { … }; #define FW_ABILITY_MAX_SPEED_MASK … #define FW_ABILITY_MAX_SPEED_16G … #define FW_ABILITY_MAX_SPEED_32G … #define FW_ABILITY_MAX_SPEED(ha) … #define QLA_GET_DATA_RATE … #define QLA_SET_DATA_RATE_NOLR … #define QLA_SET_DATA_RATE_LR … #define QLA_DEFAULT_PAYLOAD_SIZE … /* * This item might be allocated with a size > sizeof(struct purex_item). * The "size" variable gives the size of the payload (which * is variable) starting at "iocb". */ struct purex_item { … }; #include "qla_edif.h" #define SCM_FLAG_RDF_REJECT … #define SCM_FLAG_RDF_COMPLETED … #define QLA_CON_PRIMITIVE_RECEIVED … #define QLA_CONGESTION_ARB_WARNING … #define QLA_CONGESTION_ARB_ALARM … /* * Qlogic scsi host structure */ scsi_qla_host_t; struct qla27xx_image_status { … } __packed; /* 28xx aux image status bimap values */ #define QLA28XX_AUX_IMG_BOARD_CONFIG … #define QLA28XX_AUX_IMG_VPD_NVRAM … #define QLA28XX_AUX_IMG_NPIV_CONFIG_0_1 … #define QLA28XX_AUX_IMG_NPIV_CONFIG_2_3 … #define QLA28XX_AUX_IMG_NVME_PARAMS … #define SET_VP_IDX … #define SET_AL_PA … #define RESET_VP_IDX … #define RESET_AL_PA … struct qla_vp_map { … }; struct qla2_sgx { … }; #define QLA_FW_STARTED(_ha) … #define QLA_FW_STOPPED(_ha) … #define SFUB_CHECKSUM_SIZE … struct secure_flash_update_block { … }; struct secure_flash_update_block_pk { … }; /* * Macros to help code, maintain, etc. */ #define LOOP_TRANSITION(ha) … #define STATE_TRANSITION(ha) … static inline bool qla_vha_mark_busy(scsi_qla_host_t *vha) { … } #define QLA_VHA_MARK_NOT_BUSY(__vha) … \ #define QLA_QPAIR_MARK_BUSY(__qpair, __bail) … #define QLA_QPAIR_MARK_NOT_BUSY(__qpair) … #define QLA_ENA_CONF(_ha) … #define QLA_DIS_CONF(_ha) … /* * qla2x00 local function return status codes */ #define MBS_MASK … #define QLA_SUCCESS … #define QLA_INVALID_COMMAND … #define QLA_INTERFACE_ERROR … #define QLA_TEST_FAILED … #define QLA_COMMAND_ERROR … #define QLA_PARAMETER_ERROR … #define QLA_PORT_ID_USED … #define QLA_LOOP_ID_USED … #define QLA_ALL_IDS_IN_USE … #define QLA_NOT_LOGGED_IN … #define QLA_FUNCTION_TIMEOUT … #define QLA_FUNCTION_PARAMETER_ERROR … #define QLA_FUNCTION_FAILED … #define QLA_MEMORY_ALLOC_FAILED … #define QLA_LOCK_TIMEOUT … #define QLA_ABORTED … #define QLA_SUSPENDED … #define QLA_BUSY … #define QLA_ALREADY_REGISTERED … #define QLA_OS_TIMER_EXPIRED … #define QLA_ERR_NO_QPAIR … #define QLA_ERR_NOT_FOUND … #define QLA_ERR_FROM_FW … #define NVRAM_DELAY() … /* * Flash support definitions */ #define OPTROM_SIZE_2300 … #define OPTROM_SIZE_2322 … #define OPTROM_SIZE_24XX … #define OPTROM_SIZE_25XX … #define OPTROM_SIZE_81XX … #define OPTROM_SIZE_82XX … #define OPTROM_SIZE_83XX … #define OPTROM_SIZE_28XX … #define OPTROM_BURST_SIZE … #define OPTROM_BURST_DWORDS … #define QLA_DSDS_PER_IOCB … #define QLA_SG_ALL … enum nexus_wait_type { … }; #define INVALID_EDIF_SA_INDEX … #define RX_DELETE_NO_EDIF_SA_INDEX … #define QLA_SKIP_HANDLE … /* edif hash element */ struct edif_list_entry { … }; #define EDIF_TX_INDX_BASE … #define EDIF_RX_INDX_BASE … #define EDIF_RX_DELETE_FILTER_COUNT … /* entry in the sa_index free pool */ struct sa_index_pair { … }; /* edif sa_index data structure */ struct edif_sa_index_entry { … }; /* Refer to SNIA SFF 8247 */ struct sff_8247_a0 { … }; /* BPM -- Buffer Plus Management support. */ #define IS_BPM_CAPABLE(ha) … #define IS_BPM_RANGE_CAPABLE(ha) … #define IS_BPM_ENABLED(vha) … #define FLASH_SEMAPHORE_REGISTER_ADDR … #define USER_CTRL_IRQ(_ha) … #define SAVE_TOPO(_ha) … #define N2N_TOPO(ha) … #define QLA_N2N_WAIT_TIME … #define NVME_TYPE(fcport) … \ #define FCP_TYPE(fcport) … \ #define NVME_ONLY_TARGET(fcport) … \ #define NVME_FCP_TARGET(fcport) … \ #define NVME_PRIORITY(ha, fcport) … #define NVME_TARGET(ha, fcport) … \ #define PRLI_PHASE(_cls) … enum ql_vnd_host_stat_action { … }; struct ql_vnd_mng_host_stats_param { … } __packed; struct ql_vnd_mng_host_stats_resp { … } __packed; struct ql_vnd_stats_param { … } __packed; struct ql_vnd_tgt_stats_param { … } __packed; enum ql_vnd_host_port_action { … }; struct ql_vnd_mng_host_port_param { … } __packed; struct ql_vnd_mng_host_port_resp { … } __packed; struct ql_vnd_stat_entry { … } __packed; struct ql_vnd_stats { … } __packed; struct ql_vnd_host_stats_resp { … } __packed; struct ql_vnd_tgt_stats_resp { … } __packed; #include "qla_target.h" #include "qla_gbl.h" #include "qla_dbg.h" #include "qla_inline.h" #define IS_SESSION_DELETED(_fcport) … #define DBG_FCPORT_PRFMT(_fp, _fmt, _args...) … #define TMF_NOT_READY(_fcport) … #endif
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