/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2021 Broadcom. All Rights Reserved. The term * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * */ /* * All common SLI-4 structures and function prototypes. */ #ifndef _SLI4_H #define _SLI4_H #include <linux/pci.h> #include <linux/delay.h> #include "scsi/fc/fc_els.h" #include "scsi/fc/fc_fs.h" #include "../include/efc_common.h" /************************************************************************* * Common SLI-4 register offsets and field definitions */ /* SLI_INTF - SLI Interface Definition Register */ #define SLI4_INTF_REG … enum sli4_intf { … }; /* ASIC_ID - SLI ASIC Type and Revision Register */ #define SLI4_ASIC_ID_REG … enum sli4_asic { … }; enum sli4_acic_revisions { … }; struct sli4_asic_entry_t { … }; /* BMBX - Bootstrap Mailbox Register */ #define SLI4_BMBX_REG … enum sli4_bmbx { … }; static inline u32 sli_bmbx_write_hi(u64 addr) { … } static inline u32 sli_bmbx_write_lo(u64 addr) { … } /* SLIPORT_CONTROL - SLI Port Control Register */ #define SLI4_PORT_CTRL_REG … enum sli4_port_ctrl { … }; /* SLI4_SLIPORT_ERROR - SLI Port Error Register */ #define SLI4_PORT_ERROR1 … #define SLI4_PORT_ERROR2 … /* EQCQ_DOORBELL - EQ and CQ Doorbell Register */ #define SLI4_EQCQ_DB_REG … enum sli4_eqcq_e { … }; static inline u32 sli_format_eq_db_data(u16 num_popped, u16 id, u32 arm) { … } static inline u32 sli_format_cq_db_data(u16 num_popped, u16 id, u32 arm) { … } /* EQ_DOORBELL - EQ Doorbell Register for IF_TYPE = 6*/ #define SLI4_IF6_EQ_DB_REG … enum sli4_eq_e { … }; static inline u32 sli_format_if6_eq_db_data(u16 num_popped, u16 id, u32 arm) { … } /* CQ_DOORBELL - CQ Doorbell Register for IF_TYPE = 6 */ #define SLI4_IF6_CQ_DB_REG … enum sli4_cq_e { … }; static inline u32 sli_format_if6_cq_db_data(u16 num_popped, u16 id, u32 arm) { … } /* MQ_DOORBELL - MQ Doorbell Register */ #define SLI4_MQ_DB_REG … #define SLI4_IF6_MQ_DB_REG … enum sli4_mq_e { … }; static inline u32 sli_format_mq_db_data(u16 id) { … } /* RQ_DOORBELL - RQ Doorbell Register */ #define SLI4_RQ_DB_REG … #define SLI4_IF6_RQ_DB_REG … enum sli4_rq_e { … }; static inline u32 sli_format_rq_db_data(u16 id) { … } /* WQ_DOORBELL - WQ Doorbell Register */ #define SLI4_IO_WQ_DB_REG … #define SLI4_IF6_WQ_DB_REG … enum sli4_wq_e { … }; static inline u32 sli_format_wq_db_data(u16 id) { … } /* SLIPORT_STATUS - SLI Port Status Register */ #define SLI4_PORT_STATUS_REGOFF … enum sli4_port_status { … }; #define SLI4_PHYDEV_CTRL_REG … #define SLI4_PHYDEV_CTRL_FRST … #define SLI4_PHYDEV_CTRL_DD … /* Register name enums */ enum sli4_regname_en { … }; struct sli4_reg { … }; struct sli4_dmaaddr { … }; /* * a 3-word Buffer Descriptor Entry with * address 1st 2 words, length last word */ struct sli4_bufptr { … }; /* Buffer Descriptor Entry (BDE) */ enum sli4_bde_e { … }; struct sli4_bde { … }; /* Buffer Descriptors */ enum sli4_bde_type { … }; #define SLI4_BDE_TYPE_VAL(type) … /* Scatter-Gather Entry (SGE) */ #define SLI4_SGE_MAX_RESERVED … enum sli4_sge_type { … }; struct sli4_sge { … }; /* T10 DIF Scatter-Gather Entry (SGE) */ struct sli4_dif_sge { … }; /* Data Integrity Seed (DISEED) SGE */ enum sli4_diseed_sge_flags { … }; /* Opcode values */ enum sli4_diseed_sge_opcodes { … }; #define SLI4_DISEED_SGE_OP_RX_VALUE(stype) … #define SLI4_DISEED_SGE_OP_TX_VALUE(stype) … struct sli4_diseed_sge { … }; /* List Segment Pointer Scatter-Gather Entry (SGE) */ #define SLI4_LSP_SGE_SEGLEN … struct sli4_lsp_sge { … }; enum sli4_eqe_e { … }; struct sli4_eqe { … }; #define SLI4_MAJOR_CODE_STANDARD … #define SLI4_MAJOR_CODE_SENTINEL … /* Sentinel EQE indicating the EQ is full */ #define SLI4_EQE_STATUS_EQ_FULL … enum sli4_mcqe_e { … }; /* Entry was consumed but not completed */ #define SLI4_MCQE_STATUS_NOT_COMPLETED … struct sli4_mcqe { … }; enum sli4_acqe_e { … }; struct sli4_acqe { … }; enum sli4_acqe_event_code { … }; enum sli4_qtype { … }; #define SLI4_USER_MQ_COUNT … #define SLI4_MAX_CQ_SET_COUNT … #define SLI4_MAX_RQ_SET_COUNT … enum sli4_qentry { … }; enum sli4_queue_flags { … }; /* Generic Command Request header */ enum sli4_cmd_version { … }; struct sli4_rqst_hdr { … }; /* Generic Command Response header */ struct sli4_rsp_hdr { … }; #define SLI4_QUEUE_RQ_BATCH … #define SZ_DMAADDR … #define SLI4_RQST_CMDSZ(stype) … #define SLI4_RQST_PYLD_LEN(stype) … #define SLI4_RQST_PYLD_LEN_VAR(stype, varpyld) … #define SLI4_CFG_PYLD_LENGTH(stype) … enum sli4_create_cqv2_e { … }; struct sli4_rqst_cmn_create_cq_v2 { … }; enum sli4_create_cqset_e { … }; struct sli4_rqst_cmn_create_cq_set_v0 { … }; /* CQE count */ enum sli4_cq_cnt { … }; #define SLI4_CQ_CNT_SHIFT … #define SLI4_CQ_CNT_VAL(type) … #define SLI4_CQE_BYTES … #define SLI4_CREATE_CQV2_MAX_PAGES … /* Generic Common Create EQ/CQ/MQ/WQ/RQ Queue completion */ struct sli4_rsp_cmn_create_queue { … }; struct sli4_rsp_cmn_create_queue_set { … }; /* Common Destroy Queue */ struct sli4_rqst_cmn_destroy_q { … }; struct sli4_rsp_cmn_destroy_q { … }; /* Modify the delay multiplier for EQs */ struct sli4_eqdelay_rec { … }; struct sli4_rqst_cmn_modify_eq_delay { … }; struct sli4_rsp_cmn_modify_eq_delay { … }; enum sli4_create_cq_e { … }; struct sli4_rqst_cmn_create_eq { … }; struct sli4_rsp_cmn_create_eq { … }; /* EQ count */ enum sli4_eq_cnt { … }; #define SLI4_EQ_CNT_SHIFT … #define SLI4_EQ_CNT_VAL(type) … #define SLI4_EQE_SIZE_4 … #define SLI4_EQE_SIZE_16 … /* Create a Mailbox Queue; accommodate v0 and v1 forms. */ enum sli4_create_mq_flags { … }; struct sli4_rqst_cmn_create_mq_ext { … }; struct sli4_rsp_cmn_create_mq_ext { … }; enum sli4_mqe_size { … }; enum sli4_async_evt { … }; #define SLI4_ASYNC_EVT_FC_ALL … /* Create a Completion Queue. */ struct sli4_rqst_cmn_create_cq_v0 { … }; enum sli4_create_rq_e { … }; struct sli4_rqst_rq_create { … }; struct sli4_rsp_rq_create { … }; enum sli4_create_rqv1_e { … }; struct sli4_rqst_rq_create_v1 { … }; struct sli4_rsp_rq_create_v1 { … }; #define SLI4_RQCREATEV2_DNB … struct sli4_rqst_rq_create_v2 { … }; struct sli4_rsp_rq_create_v2 { … }; #define SLI4_CQE_CODE_OFFSET … enum sli4_cqe_code { … }; #define SLI4_WQ_CREATE_MAX_PAGES … struct sli4_rqst_wq_create { … }; struct sli4_rsp_wq_create { … }; enum sli4_link_attention_flags { … }; struct sli4_link_attention { … }; enum sli4_link_event_type { … }; enum sli4_wcqe_flags { … }; struct sli4_fc_wcqe { … }; /* FC WQ consumed CQ queue entry */ struct sli4_fc_wqec { … }; /* FC Completion Status Codes. */ enum sli4_wcqe_status { … }; /* DI_ERROR Extended Status */ enum sli4_fc_di_error_status { … }; /* WQE DIF field contents */ enum sli4_dif_fields { … }; /* Work Queue Entry (WQE) types */ enum sli4_wqe_types { … }; /* WQE command types */ enum sli4_wqe_cmds { … }; #define SLI4_WQE_SIZE … #define SLI4_WQE_EXT_SIZE … #define SLI4_WQE_BYTES … #define SLI4_WQE_EXT_BYTES … /* Mask for ccp (CS_CTL) */ #define SLI4_MASK_CCP … /* Generic WQE */ enum sli4_gen_wqe_flags { … }; struct sli4_generic_wqe { … }; /* WQE used to abort exchanges. */ enum sli4_abort_wqe_flags { … }; struct sli4_abort_wqe { … }; enum sli4_abort_criteria { … }; enum sli4_abort_type { … }; /* WQE used to create an ELS request. */ enum sli4_els_req_wqe_flags { … }; struct sli4_els_request64_wqe { … }; /* WQE used to create an FCP initiator no data command. */ enum sli4_icmd_wqe_flags { … }; struct sli4_fcp_icmnd64_wqe { … }; /* WQE used to create an FCP initiator read. */ enum sli4_ir_wqe_flags { … }; struct sli4_fcp_iread64_wqe { … }; /* WQE used to create an FCP initiator write. */ enum sli4_iwr_wqe_flags { … }; struct sli4_fcp_iwrite64_wqe { … }; struct sli4_fcp_128byte_wqe { … }; /* WQE used to create an FCP target receive */ enum sli4_trcv_wqe_flags { … }; struct sli4_fcp_treceive64_wqe { … }; /* WQE used to create an FCP target response */ enum sli4_trsp_wqe_flags { … }; struct sli4_fcp_trsp64_wqe { … }; /* WQE used to create an FCP target send (DATA IN). */ enum sli4_tsend_wqe_flags { … }; struct sli4_fcp_tsend64_wqe { … }; /* WQE used to create a general request. */ enum sli4_gen_req_wqe_flags { … }; struct sli4_gen_request64_wqe { … }; /* WQE used to create a send frame request */ enum sli4_sf_wqe_flags { … }; struct sli4_send_frame_wqe { … }; /* WQE used to create a transmit sequence */ enum sli4_seq_wqe_flags { … }; struct sli4_xmit_sequence64_wqe { … }; /* * WQE used unblock the specified XRI and to release * it to the SLI Port's free pool. */ enum sli4_requeue_wqe_flags { … }; struct sli4_requeue_xri_wqe { … }; /* WQE used to create a BLS response */ enum sli4_bls_rsp_wqe_flags { … }; struct sli4_xmit_bls_rsp_wqe { … }; enum sli_bls_type { … }; struct sli_bls_payload { … }; /* WQE used to create an ELS response */ enum sli4_els_rsp_flags { … }; struct sli4_xmit_els_rsp64_wqe { … }; /* Local Reject Reason Codes */ enum sli4_fc_local_rej_codes { … }; enum sli4_async_rcqe_flags { … }; struct sli4_fc_async_rcqe { … }; struct sli4_fc_async_rcqe_v1 { … }; enum sli4_fc_async_rq_status { … }; #define SLI4_RCQE_RQ_EL_INDX … struct sli4_fc_coalescing_rcqe { … }; #define SLI4_FC_COALESCE_RQ_SUCCESS … #define SLI4_FC_COALESCE_RQ_INSUFF_XRI_NEEDED … enum sli4_optimized_write_cmd_cqe_flags { … }; struct sli4_fc_optimized_write_cmd_cqe { … }; #define SLI4_OCQE_XB … struct sli4_fc_optimized_write_data_cqe { … }; struct sli4_fc_xri_aborted_cqe { … }; enum sli4_generic_ctx { … }; #define SLI4_GENERIC_CLASS_CLASS_2 … #define SLI4_GENERIC_CLASS_CLASS_3 … #define SLI4_ELS_REQUEST64_DIR_WRITE … #define SLI4_ELS_REQUEST64_DIR_READ … enum sli4_els_request { … }; enum sli4_els_cmd_type { … }; #define SLI_PAGE_SIZE … #define SLI4_BMBX_TIMEOUT_MSEC … #define SLI4_FW_READY_TIMEOUT_MSEC … #define SLI4_BMBX_DELAY_US … #define SLI4_INIT_PORT_DELAY_US … static inline u32 sli_page_count(size_t bytes, u32 page_size) { … } /************************************************************************* * SLI-4 mailbox command formats and definitions */ struct sli4_mbox_command_header { … }; enum sli4_mbx_cmd_value { … }; enum sli4_mbx_status { … }; /* CONFIG_LINK - configure link-oriented parameters, * such as default N_Port_ID address and various timers */ enum sli4_cmd_config_link_flags { … }; struct sli4_cmd_config_link { … }; #define SLI4_DUMP4_TYPE … #define SLI4_WKI_TAG_SAT_TEM … struct sli4_cmd_dump4 { … }; /* INIT_LINK - initialize the link for a FC port */ enum sli4_init_link_flags { … }; enum sli4_fc_link_speed { … }; struct sli4_cmd_init_link { … }; /* INIT_VFI - initialize the VFI resource */ enum sli4_init_vfi_flags { … }; struct sli4_cmd_init_vfi { … }; /* INIT_VPI - initialize the VPI resource */ struct sli4_cmd_init_vpi { … }; /* POST_XRI - post XRI resources to the SLI Port */ enum sli4_post_xri_flags { … }; struct sli4_cmd_post_xri { … }; /* RELEASE_XRI - Release XRI resources from the SLI Port */ enum sli4_release_xri_flags { … }; struct sli4_cmd_release_xri { … }; /* READ_CONFIG - read SLI port configuration parameters */ struct sli4_cmd_read_config { … }; enum sli4_read_cfg_resp_flags { … }; enum sli4_read_cfg_topo { … }; /* Link Module Type */ enum sli4_read_cfg_lmt { … }; struct sli4_rsp_read_config { … }; /* READ_NVPARMS - read SLI port configuration parameters */ enum sli4_read_nvparms_flags { … }; struct sli4_cmd_read_nvparms { … }; /* WRITE_NVPARMS - write SLI port configuration parameters */ struct sli4_cmd_write_nvparms { … }; /* READ_REV - read the Port revision levels */ enum { … }; struct sli4_cmd_read_rev { … }; /* READ_SPARM64 - read the Port service parameters */ #define SLI4_READ_SPARM64_WWPN_OFFSET … #define SLI4_READ_SPARM64_WWNN_OFFSET … struct sli4_cmd_read_sparm64 { … }; /* READ_TOPOLOGY - read the link event information */ enum sli4_read_topo_e { … }; #define SLI4_MIN_LOOP_MAP_BYTES … struct sli4_cmd_read_topology { … }; enum sli4_read_topo_link { … }; enum sli4_read_topo { … }; enum sli4_read_topo_speed { … }; /* REG_FCFI - activate a FC Forwarder */ struct sli4_cmd_reg_fcfi_rq_cfg { … }; enum sli4_regfcfi_tag { … }; #define SLI4_CMD_REG_FCFI_NUM_RQ_CFG … struct sli4_cmd_reg_fcfi { … }; #define SLI4_CMD_REG_FCFI_MRQ_NUM_RQ_CFG … #define SLI4_CMD_REG_FCFI_MRQ_MAX_NUM_RQ … #define SLI4_CMD_REG_FCFI_SET_FCFI_MODE … #define SLI4_CMD_REG_FCFI_SET_MRQ_MODE … enum sli4_reg_fcfi_mrq { … }; struct sli4_cmd_reg_fcfi_mrq { … }; struct sli4_cmd_rq_cfg { … }; /* REG_RPI - register a Remote Port Indicator */ enum sli4_reg_rpi { … }; struct sli4_cmd_reg_rpi { … }; #define SLI4_REG_RPI_BUF_LEN … /* REG_VFI - register a Virtual Fabric Indicator */ enum sli_reg_vfi { … }; struct sli4_cmd_reg_vfi { … }; /* REG_VPI - register a Virtual Port Indicator */ enum sli4_reg_vpi { … }; struct sli4_cmd_reg_vpi { … }; /* REQUEST_FEATURES - request / query SLI features */ enum sli4_req_features_flags { … }; struct sli4_cmd_request_features { … }; /* * SLI_CONFIG - submit a configuration command to Port * * Command is either embedded as part of the payload (embed) or located * in a separate memory buffer (mem) */ enum sli4_sli_config { … }; struct sli4_cmd_sli_config { … }; /* READ_STATUS - read tx/rx status of a particular port */ #define SLI4_READSTATUS_CLEAR_COUNTERS … struct sli4_cmd_read_status { … }; /* READ_LNK_STAT - read link status of a particular port */ enum sli4_read_link_stats_flags { … }; struct sli4_cmd_read_link_stats { … }; /* Format a WQE with WQ_ID Association performance hint */ static inline void sli_set_wq_id_association(void *entry, u16 q_id) { … } /* UNREG_FCFI - unregister a FCFI */ struct sli4_cmd_unreg_fcfi { … }; /* UNREG_RPI - unregister one or more RPI */ enum sli4_unreg_rpi { … }; struct sli4_cmd_unreg_rpi { … }; /* UNREG_VFI - unregister one or more VFI */ enum sli4_unreg_vfi { … }; struct sli4_cmd_unreg_vfi { … }; enum sli4_unreg_type { … }; /* UNREG_VPI - unregister one or more VPI */ enum sli4_unreg_vpi { … }; struct sli4_cmd_unreg_vpi { … }; /* AUTO_XFER_RDY - Configure the auto-generate XFER-RDY feature */ struct sli4_cmd_config_auto_xfer_rdy { … }; #define SLI4_CONFIG_AUTO_XFERRDY_BLKSIZE … struct sli4_cmd_config_auto_xfer_rdy_hp { … }; /************************************************************************* * SLI-4 common configuration command formats and definitions */ /* * Subsystem values. */ enum sli4_subsystem { … }; #define SLI4_OPC_LOWLEVEL_SET_WATCHDOG … /* * Common opcode (OPC) values. */ enum sli4_cmn_opcode { … }; /* DMTF opcode (OPC) values */ #define DMTF_EXEC_CLP_CMD … /* * COMMON_FUNCTION_RESET * * Resets the Port, returning it to a power-on state. This configuration * command does not have a payload and should set/expect the lengths to * be zero. */ struct sli4_rqst_cmn_function_reset { … }; struct sli4_rsp_cmn_function_reset { … }; /* * COMMON_GET_CNTL_ATTRIBUTES * * Query for information about the SLI Port */ enum sli4_cntrl_attr_flags { … }; struct sli4_rsp_cmn_get_cntl_attributes { … }; /* * COMMON_GET_CNTL_ATTRIBUTES * * This command queries the controller information from the Flash ROM. */ struct sli4_rqst_cmn_get_cntl_addl_attributes { … }; struct sli4_rsp_cmn_get_cntl_addl_attributes { … }; /* * COMMON_NOP * * This command does not do anything; it only returns * the payload in the completion. */ struct sli4_rqst_cmn_nop { … }; struct sli4_rsp_cmn_nop { … }; struct sli4_rqst_cmn_get_resource_extent_info { … }; enum sli4_rsc_type { … }; struct sli4_rsp_cmn_get_resource_extent_info { … }; #define SLI4_128BYTE_WQE_SUPPORT … #define GET_Q_CNT_METHOD(m) … #define GET_Q_CREATE_VERSION(v) … enum sli4_rsp_get_params_e { … }; struct sli4_rqst_cmn_get_sli4_params { … }; struct sli4_rsp_cmn_get_sli4_params { … }; /*Port Types*/ enum sli4_port_types { … }; struct sli4_rqst_cmn_get_port_name { … }; struct sli4_rsp_cmn_get_port_name { … }; struct sli4_rqst_cmn_write_flashrom { … }; /* * COMMON_READ_TRANSCEIVER_DATA * * This command reads SFF transceiver data(Format is defined * by the SFF-8472 specification). */ struct sli4_rqst_cmn_read_transceiver_data { … }; struct sli4_rsp_cmn_read_transceiver_data { … }; #define SLI4_REQ_DESIRE_READLEN … struct sli4_rqst_cmn_read_object { … }; #define RSP_COM_READ_OBJ_EOF … struct sli4_rsp_cmn_read_object { … }; enum sli4_rqst_write_object_flags { … }; struct sli4_rqst_cmn_write_object { … }; #define RSP_CHANGE_STATUS … struct sli4_rsp_cmn_write_object { … }; struct sli4_rqst_cmn_delete_object { … }; #define SLI4_RQ_OBJ_LIST_READ_LEN … struct sli4_rqst_cmn_read_object_list { … }; enum sli4_rqst_set_dump_flags { … }; struct sli4_rqst_cmn_set_dump_location { … }; struct sli4_rsp_cmn_set_dump_location { … }; enum sli4_dump_level { … }; enum sli4_dump_state { … }; enum sli4_dump_status { … }; enum sli4_set_features { … }; struct sli4_rqst_cmn_set_features { … }; struct sli4_rqst_cmn_set_features_dif_seed { … }; enum sli4_rqst_set_mrq_features { … }; struct sli4_rqst_cmn_set_features_multirq { … }; enum sli4_rqst_health_check_flags { … }; struct sli4_rqst_cmn_set_features_health_check { … }; struct sli4_rqst_cmn_set_features_set_fdt_xfer_hint { … }; struct sli4_rqst_dmtf_exec_clp_cmd { … }; struct sli4_rsp_dmtf_exec_clp_cmd { … }; #define SLI4_PROTOCOL_FC … #define SLI4_PROTOCOL_DEFAULT … struct sli4_rspource_descriptor_v1 { … }; enum sli4_pcie_desc_flags { … }; struct sli4_pcie_resource_descriptor_v1 { … }; struct sli4_rqst_cmn_get_function_config { … }; struct sli4_rsp_cmn_get_function_config { … }; /* Link Config Descriptor for link config functions */ struct sli4_link_config_descriptor { … }; #define MAX_LINK_DES … struct sli4_rqst_cmn_get_reconfig_link_info { … }; struct sli4_rsp_cmn_get_reconfig_link_info { … }; enum sli4_set_reconfig_link_flags { … }; struct sli4_rqst_cmn_set_reconfig_link_id { … }; struct sli4_rsp_cmn_set_reconfig_link_id { … }; struct sli4_rqst_lowlevel_set_watchdog { … }; struct sli4_rsp_lowlevel_set_watchdog { … }; /* FC opcode (OPC) values */ enum sli4_fc_opcodes { … }; /* Use the default CQ associated with the WQ */ #define SLI4_CQ_DEFAULT … /* * POST_SGL_PAGES * * Register the scatter gather list (SGL) memory and * associate it with an XRI. */ struct sli4_rqst_post_sgl_pages { … }; struct sli4_rsp_post_sgl_pages { … }; struct sli4_rqst_post_hdr_templates { … }; #define SLI4_HDR_TEMPLATE_SIZE … enum sli4_io_flags { … }; enum sli4_callback { … }; enum sli4_link_status { … }; enum sli4_link_topology { … }; enum sli4_link_medium { … }; /******Driver specific structures******/ struct sli4_queue { … }; /* Parameters used to populate WQE*/ struct sli_bls_params { … }; struct sli_els_params { … }; struct sli_ct_params { … }; struct sli_fcp_tgt_params { … }; struct sli4_link_event { … }; enum sli4_resource { … }; struct sli4_extent { … }; struct sli4_queue_info { … }; struct sli4_params { … }; struct sli4 { … }; static inline void sli_cmd_fill_hdr(struct sli4_rqst_hdr *hdr, u8 opc, u8 sub, u32 ver, __le32 len) { … } /** * Get / set parameter functions */ static inline u32 sli_get_max_sge(struct sli4 *sli4) { … } static inline u32 sli_get_max_sgl(struct sli4 *sli4) { … } static inline enum sli4_link_medium sli_get_medium(struct sli4 *sli4) { … } static inline u32 sli_get_lmt(struct sli4 *sli4) { … } static inline int sli_set_topology(struct sli4 *sli4, u32 value) { … } static inline u32 sli_convert_mask_to_count(u32 method, u32 mask) { … } static inline u32 sli_reg_read_status(struct sli4 *sli) { … } static inline int sli_fw_error_status(struct sli4 *sli4) { … } static inline u32 sli_reg_read_err1(struct sli4 *sli) { … } static inline u32 sli_reg_read_err2(struct sli4 *sli) { … } static inline int sli_fc_rqe_length(struct sli4 *sli4, void *cqe, u32 *len_hdr, u32 *len_data) { … } static inline u8 sli_fc_rqe_fcfi(struct sli4 *sli4, void *cqe) { … } /**************************************************************************** * Function prototypes */ int sli_cmd_config_link(struct sli4 *sli4, void *buf); int sli_cmd_down_link(struct sli4 *sli4, void *buf); int sli_cmd_dump_type4(struct sli4 *sli4, void *buf, u16 wki); int sli_cmd_common_read_transceiver_data(struct sli4 *sli4, void *buf, u32 page_num, struct efc_dma *dma); int sli_cmd_read_link_stats(struct sli4 *sli4, void *buf, u8 req_stats, u8 clear_overflow_flags, u8 clear_all_counters); int sli_cmd_read_status(struct sli4 *sli4, void *buf, u8 clear); int sli_cmd_init_link(struct sli4 *sli4, void *buf, u32 speed, u8 reset_alpa); int sli_cmd_init_vfi(struct sli4 *sli4, void *buf, u16 vfi, u16 fcfi, u16 vpi); int sli_cmd_init_vpi(struct sli4 *sli4, void *buf, u16 vpi, u16 vfi); int sli_cmd_post_xri(struct sli4 *sli4, void *buf, u16 base, u16 cnt); int sli_cmd_release_xri(struct sli4 *sli4, void *buf, u8 num_xri); int sli_cmd_read_sparm64(struct sli4 *sli4, void *buf, struct efc_dma *dma, u16 vpi); int sli_cmd_read_topology(struct sli4 *sli4, void *buf, struct efc_dma *dma); int sli_cmd_read_nvparms(struct sli4 *sli4, void *buf); int sli_cmd_write_nvparms(struct sli4 *sli4, void *buf, u8 *wwpn, u8 *wwnn, u8 hard_alpa, u32 preferred_d_id); int sli_cmd_reg_fcfi(struct sli4 *sli4, void *buf, u16 index, struct sli4_cmd_rq_cfg *rq_cfg); int sli_cmd_reg_fcfi_mrq(struct sli4 *sli4, void *buf, u8 mode, u16 index, u8 rq_selection_policy, u8 mrq_bit_mask, u16 num_mrqs, struct sli4_cmd_rq_cfg *rq_cfg); int sli_cmd_reg_rpi(struct sli4 *sli4, void *buf, u32 rpi, u32 vpi, u32 fc_id, struct efc_dma *dma, u8 update, u8 enable_t10_pi); int sli_cmd_unreg_fcfi(struct sli4 *sli4, void *buf, u16 indicator); int sli_cmd_unreg_rpi(struct sli4 *sli4, void *buf, u16 indicator, enum sli4_resource which, u32 fc_id); int sli_cmd_reg_vpi(struct sli4 *sli4, void *buf, u32 fc_id, __be64 sli_wwpn, u16 vpi, u16 vfi, bool update); int sli_cmd_reg_vfi(struct sli4 *sli4, void *buf, size_t size, u16 vfi, u16 fcfi, struct efc_dma dma, u16 vpi, __be64 sli_wwpn, u32 fc_id); int sli_cmd_unreg_vpi(struct sli4 *sli4, void *buf, u16 id, u32 type); int sli_cmd_unreg_vfi(struct sli4 *sli4, void *buf, u16 idx, u32 type); int sli_cmd_common_nop(struct sli4 *sli4, void *buf, uint64_t context); int sli_cmd_common_get_resource_extent_info(struct sli4 *sli4, void *buf, u16 rtype); int sli_cmd_common_get_sli4_parameters(struct sli4 *sli4, void *buf); int sli_cmd_common_write_object(struct sli4 *sli4, void *buf, u16 noc, u16 eof, u32 len, u32 offset, char *name, struct efc_dma *dma); int sli_cmd_common_delete_object(struct sli4 *sli4, void *buf, char *object_name); int sli_cmd_common_read_object(struct sli4 *sli4, void *buf, u32 length, u32 offset, char *name, struct efc_dma *dma); int sli_cmd_dmtf_exec_clp_cmd(struct sli4 *sli4, void *buf, struct efc_dma *cmd, struct efc_dma *resp); int sli_cmd_common_set_dump_location(struct sli4 *sli4, void *buf, bool query, bool is_buffer_list, struct efc_dma *dma, u8 fdb); int sli_cmd_common_set_features(struct sli4 *sli4, void *buf, u32 feature, u32 param_len, void *parameter); int sli_cqe_mq(struct sli4 *sli4, void *buf); int sli_cqe_async(struct sli4 *sli4, void *buf); int sli_setup(struct sli4 *sli4, void *os, struct pci_dev *pdev, void __iomem *r[]); void sli_calc_max_qentries(struct sli4 *sli4); int sli_init(struct sli4 *sli4); int sli_reset(struct sli4 *sli4); int sli_fw_reset(struct sli4 *sli4); void sli_teardown(struct sli4 *sli4); int sli_callback(struct sli4 *sli4, enum sli4_callback cb, void *func, void *arg); int sli_bmbx_command(struct sli4 *sli4); int __sli_queue_init(struct sli4 *sli4, struct sli4_queue *q, u32 qtype, size_t size, u32 n_entries, u32 align); int __sli_create_queue(struct sli4 *sli4, struct sli4_queue *q); int sli_eq_modify_delay(struct sli4 *sli4, struct sli4_queue *eq, u32 num_eq, u32 shift, u32 delay_mult); int sli_queue_alloc(struct sli4 *sli4, u32 qtype, struct sli4_queue *q, u32 n_entries, struct sli4_queue *assoc); int sli_cq_alloc_set(struct sli4 *sli4, struct sli4_queue *qs[], u32 num_cqs, u32 n_entries, struct sli4_queue *eqs[]); int sli_get_queue_entry_size(struct sli4 *sli4, u32 qtype); int sli_queue_free(struct sli4 *sli4, struct sli4_queue *q, u32 destroy_queues, u32 free_memory); int sli_queue_eq_arm(struct sli4 *sli4, struct sli4_queue *q, bool arm); int sli_queue_arm(struct sli4 *sli4, struct sli4_queue *q, bool arm); int sli_wq_write(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_mq_write(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_rq_write(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_eq_read(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_cq_read(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_mq_read(struct sli4 *sli4, struct sli4_queue *q, u8 *entry); int sli_resource_alloc(struct sli4 *sli4, enum sli4_resource rtype, u32 *rid, u32 *index); int sli_resource_free(struct sli4 *sli4, enum sli4_resource rtype, u32 rid); int sli_resource_reset(struct sli4 *sli4, enum sli4_resource rtype); int sli_eq_parse(struct sli4 *sli4, u8 *buf, u16 *cq_id); int sli_cq_parse(struct sli4 *sli4, struct sli4_queue *cq, u8 *cqe, enum sli4_qentry *etype, u16 *q_id); int sli_raise_ue(struct sli4 *sli4, u8 dump); int sli_dump_is_ready(struct sli4 *sli4); bool sli_reset_required(struct sli4 *sli4); bool sli_fw_ready(struct sli4 *sli4); int sli_fc_process_link_attention(struct sli4 *sli4, void *acqe); int sli_fc_cqe_parse(struct sli4 *sli4, struct sli4_queue *cq, u8 *cqe, enum sli4_qentry *etype, u16 *rid); u32 sli_fc_response_length(struct sli4 *sli4, u8 *cqe); u32 sli_fc_io_length(struct sli4 *sli4, u8 *cqe); int sli_fc_els_did(struct sli4 *sli4, u8 *cqe, u32 *d_id); u32 sli_fc_ext_status(struct sli4 *sli4, u8 *cqe); int sli_fc_rqe_rqid_and_index(struct sli4 *sli4, u8 *cqe, u16 *rq_id, u32 *index); int sli_cmd_wq_create(struct sli4 *sli4, void *buf, struct efc_dma *qmem, u16 cq_id); int sli_cmd_post_sgl_pages(struct sli4 *sli4, void *buf, u16 xri, u32 xri_count, struct efc_dma *page0[], struct efc_dma *page1[], struct efc_dma *dma); int sli_cmd_post_hdr_templates(struct sli4 *sli4, void *buf, struct efc_dma *dma, u16 rpi, struct efc_dma *payload_dma); int sli_fc_rq_alloc(struct sli4 *sli4, struct sli4_queue *q, u32 n_entries, u32 buffer_size, struct sli4_queue *cq, bool is_hdr); int sli_fc_rq_set_alloc(struct sli4 *sli4, u32 num_rq_pairs, struct sli4_queue *q[], u32 base_cq_id, u32 num, u32 hdr_buf_size, u32 data_buf_size); u32 sli_fc_get_rpi_requirements(struct sli4 *sli4, u32 n_rpi); int sli_abort_wqe(struct sli4 *sli4, void *buf, enum sli4_abort_type type, bool send_abts, u32 ids, u32 mask, u16 tag, u16 cq_id); int sli_send_frame_wqe(struct sli4 *sli4, void *buf, u8 sof, u8 eof, u32 *hdr, struct efc_dma *payload, u32 req_len, u8 timeout, u16 xri, u16 req_tag); int sli_xmit_els_rsp64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *rsp, struct sli_els_params *params); int sli_els_request64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, struct sli_els_params *params); int sli_fcp_icmnd64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, u16 xri, u16 tag, u16 cq_id, u32 rpi, u32 rnode_fcid, u8 timeout); int sli_fcp_iread64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, u32 first_data_sge, u32 xfer_len, u16 xri, u16 tag, u16 cq_id, u32 rpi, u32 rnode_fcid, u8 dif, u8 bs, u8 timeout); int sli_fcp_iwrite64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, u32 first_data_sge, u32 xfer_len, u32 first_burst, u16 xri, u16 tag, u16 cq_id, u32 rpi, u32 rnode_fcid, u8 dif, u8 bs, u8 timeout); int sli_fcp_treceive64_wqe(struct sli4 *sli, void *buf, struct efc_dma *sgl, u32 first_data_sge, u16 cq_id, u8 dif, u8 bs, struct sli_fcp_tgt_params *params); int sli_fcp_cont_treceive64_wqe(struct sli4 *sli, void *buf, struct efc_dma *sgl, u32 first_data_sge, u16 sec_xri, u16 cq_id, u8 dif, u8 bs, struct sli_fcp_tgt_params *params); int sli_fcp_trsp64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, u16 cq_id, u8 port_owned, struct sli_fcp_tgt_params *params); int sli_fcp_tsend64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, u32 first_data_sge, u16 cq_id, u8 dif, u8 bs, struct sli_fcp_tgt_params *params); int sli_gen_request64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *sgl, struct sli_ct_params *params); int sli_xmit_bls_rsp64_wqe(struct sli4 *sli4, void *buf, struct sli_bls_payload *payload, struct sli_bls_params *params); int sli_xmit_sequence64_wqe(struct sli4 *sli4, void *buf, struct efc_dma *payload, struct sli_ct_params *params); int sli_requeue_xri_wqe(struct sli4 *sli4, void *buf, u16 xri, u16 tag, u16 cq_id); void sli4_cmd_lowlevel_set_watchdog(struct sli4 *sli4, void *buf, size_t size, u16 timeout); const char *sli_fc_get_status_string(u32 status); #endif /* !_SLI4_H */
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