/* SPDX-License-Identifier: GPL-2.0 */ /* * driver for Microchip PQI-based storage controllers * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries * Copyright (c) 2016-2018 Microsemi Corporation * Copyright (c) 2016 PMC-Sierra, Inc. * * Questions/Comments/Bugfixes to [email protected] * */ #include <linux/io-64-nonatomic-lo-hi.h> #if !defined(_SMARTPQI_H) #define _SMARTPQI_H #include <scsi/scsi_host.h> #include <linux/bsg-lib.h> #pragma pack(1) #define PQI_DEVICE_SIGNATURE … /* This structure is defined by the PQI specification. */ struct pqi_device_registers { … }; /* * controller registers * * These are defined by the Microchip implementation. * * Some registers (those named sis_*) are only used when in * legacy SIS mode before we transition the controller into * PQI mode. There are a number of other SIS mode registers, * but we don't use them, so only the SIS registers that we * care about are defined here. The offsets mentioned in the * comments are the offsets from the PCIe BAR 0. */ struct pqi_ctrl_registers { … }; #define PQI_DEVICE_REGISTERS_OFFSET … /* shutdown reasons for taking the controller offline */ enum pqi_ctrl_shutdown_reason { … }; enum pqi_io_path { … }; enum pqi_irq_mode { … }; struct pqi_sg_descriptor { … }; /* manifest constants for the flags field of pqi_sg_descriptor */ #define CISS_SG_LAST … #define CISS_SG_CHAIN … struct pqi_iu_header { … }; /* manifest constants for pqi_iu_header.driver_flags */ #define PQI_DRIVER_NONBLOCKABLE_REQUEST … /* * According to the PQI spec, the IU header is only the first 4 bytes of our * pqi_iu_header structure. */ #define PQI_REQUEST_HEADER_LENGTH … struct pqi_general_admin_request { … }; struct pqi_general_admin_response { … }; struct pqi_iu_layer_descriptor { … }; struct pqi_device_capability { … }; #define PQI_MAX_EMBEDDED_SG_DESCRIPTORS … #define PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS … struct pqi_raid_path_request { … }; struct pqi_aio_path_request { … }; #define PQI_RAID1_NVME_XFER_LIMIT … struct pqi_aio_r1_path_request { … }; #define PQI_DEFAULT_MAX_WRITE_RAID_5_6 … #define PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA … #define PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME … struct pqi_aio_r56_path_request { … }; struct pqi_io_response { … }; struct pqi_general_management_request { … }; struct pqi_event_descriptor { … }; struct pqi_event_config { … }; #define PQI_MAX_EVENT_DESCRIPTORS … #define PQI_EVENT_OFA_MEMORY_ALLOCATION … #define PQI_EVENT_OFA_QUIESCE … #define PQI_EVENT_OFA_CANCELED … struct pqi_event_response { … }; struct pqi_event_acknowledge_request { … }; struct pqi_task_management_request { … }; #define SOP_TASK_MANAGEMENT_LUN_RESET … struct pqi_task_management_response { … }; struct pqi_vendor_general_request { … }; struct pqi_vendor_general_response { … }; #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE … #define PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE … #define PQI_OFA_VERSION … #define PQI_OFA_SIGNATURE … #define PQI_OFA_MAX_SG_DESCRIPTORS … struct pqi_ofa_memory { … }; struct pqi_aio_error_info { … }; struct pqi_raid_error_info { … }; #define PQI_REQUEST_IU_TASK_MANAGEMENT … #define PQI_REQUEST_IU_RAID_PATH_IO … #define PQI_REQUEST_IU_AIO_PATH_IO … #define PQI_REQUEST_IU_AIO_PATH_RAID5_IO … #define PQI_REQUEST_IU_AIO_PATH_RAID6_IO … #define PQI_REQUEST_IU_AIO_PATH_RAID1_IO … #define PQI_REQUEST_IU_GENERAL_ADMIN … #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG … #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG … #define PQI_REQUEST_IU_VENDOR_GENERAL … #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT … #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT … #define PQI_RESPONSE_IU_TASK_MANAGEMENT … #define PQI_RESPONSE_IU_GENERAL_ADMIN … #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS … #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS … #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR … #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR … #define PQI_RESPONSE_IU_AIO_PATH_DISABLED … #define PQI_RESPONSE_IU_VENDOR_EVENT … #define PQI_RESPONSE_IU_VENDOR_GENERAL … #define PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY … #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ … #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ … #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ … #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ … #define PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY … #define PQI_GENERAL_ADMIN_STATUS_SUCCESS … #define PQI_IQ_PROPERTY_IS_AIO_QUEUE … #define PQI_GENERAL_ADMIN_IU_LENGTH … #define PQI_PROTOCOL_SOP … #define PQI_DATA_IN_OUT_GOOD … #define PQI_DATA_IN_OUT_UNDERFLOW … #define PQI_DATA_IN_OUT_BUFFER_ERROR … #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW … #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA … #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE … #define PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR … #define PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT … #define PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED … #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED … #define PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED … #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST … #define PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION … #define PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED … #define PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ … #define PQI_DATA_IN_OUT_ERROR … #define PQI_DATA_IN_OUT_PROTOCOL_ERROR … #define PQI_DATA_IN_OUT_HARDWARE_ERROR … #define PQI_DATA_IN_OUT_UNSOLICITED_ABORT … #define PQI_DATA_IN_OUT_ABORTED … #define PQI_DATA_IN_OUT_TIMEOUT … #define CISS_CMD_STATUS_SUCCESS … #define CISS_CMD_STATUS_TARGET_STATUS … #define CISS_CMD_STATUS_DATA_UNDERRUN … #define CISS_CMD_STATUS_DATA_OVERRUN … #define CISS_CMD_STATUS_INVALID … #define CISS_CMD_STATUS_PROTOCOL_ERROR … #define CISS_CMD_STATUS_HARDWARE_ERROR … #define CISS_CMD_STATUS_CONNECTION_LOST … #define CISS_CMD_STATUS_ABORTED … #define CISS_CMD_STATUS_ABORT_FAILED … #define CISS_CMD_STATUS_UNSOLICITED_ABORT … #define CISS_CMD_STATUS_TIMEOUT … #define CISS_CMD_STATUS_UNABORTABLE … #define CISS_CMD_STATUS_TMF … #define CISS_CMD_STATUS_AIO_DISABLED … #define PQI_CMD_STATUS_ABORTED … #define PQI_NUM_EVENT_QUEUE_ELEMENTS … #define PQI_EVENT_OQ_ELEMENT_LENGTH … #define PQI_EVENT_TYPE_HOTPLUG … #define PQI_EVENT_TYPE_HARDWARE … #define PQI_EVENT_TYPE_PHYSICAL_DEVICE … #define PQI_EVENT_TYPE_LOGICAL_DEVICE … #define PQI_EVENT_TYPE_OFA … #define PQI_EVENT_TYPE_AIO_STATE_CHANGE … #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE … #pragma pack() #define PQI_ERROR_BUFFER_ELEMENT_LENGTH … /* these values are based on our implementation */ #define PQI_ADMIN_IQ_NUM_ELEMENTS … #define PQI_ADMIN_OQ_NUM_ELEMENTS … #define PQI_ADMIN_IQ_ELEMENT_LENGTH … #define PQI_ADMIN_OQ_ELEMENT_LENGTH … #define PQI_OPERATIONAL_IQ_ELEMENT_LENGTH … #define PQI_OPERATIONAL_OQ_ELEMENT_LENGTH … #define PQI_MIN_MSIX_VECTORS … #define PQI_MAX_MSIX_VECTORS … /* these values are defined by the PQI spec */ #define PQI_MAX_NUM_ELEMENTS_ADMIN_QUEUE … #define PQI_MAX_NUM_ELEMENTS_OPERATIONAL_QUEUE … #define PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT … #define PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT … #define PQI_ADMIN_INDEX_ALIGNMENT … #define PQI_OPERATIONAL_INDEX_ALIGNMENT … #define PQI_MIN_OPERATIONAL_QUEUE_ID … #define PQI_MAX_OPERATIONAL_QUEUE_ID … #define PQI_AIO_SERV_RESPONSE_COMPLETE … #define PQI_AIO_SERV_RESPONSE_FAILURE … #define PQI_AIO_SERV_RESPONSE_TMF_COMPLETE … #define PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED … #define PQI_AIO_SERV_RESPONSE_TMF_REJECTED … #define PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN … #define PQI_AIO_STATUS_IO_ERROR … #define PQI_AIO_STATUS_IO_ABORTED … #define PQI_AIO_STATUS_NO_PATH_TO_DEVICE … #define PQI_AIO_STATUS_INVALID_DEVICE … #define PQI_AIO_STATUS_AIO_PATH_DISABLED … #define PQI_AIO_STATUS_UNDERRUN … #define PQI_AIO_STATUS_OVERRUN … pqi_index_t; /* SOP data direction flags */ #define SOP_NO_DIRECTION_FLAG … #define SOP_WRITE_FLAG … /* buffer */ #define SOP_READ_FLAG … /* buffer */ #define SOP_BIDIRECTIONAL … /* Data-Out buffer and data is */ /* transferred to the Data-In buffer */ #define SOP_TASK_ATTRIBUTE_SIMPLE … #define SOP_TASK_ATTRIBUTE_HEAD_OF_QUEUE … #define SOP_TASK_ATTRIBUTE_ORDERED … #define SOP_TASK_ATTRIBUTE_ACA … #define SOP_TMF_COMPLETE … #define SOP_TMF_REJECTED … #define SOP_TMF_FUNCTION_SUCCEEDED … #define SOP_TMF_INCORRECT_LOGICAL_UNIT … /* additional CDB bytes usage field codes */ #define SOP_ADDITIONAL_CDB_BYTES_0 … #define SOP_ADDITIONAL_CDB_BYTES_4 … #define SOP_ADDITIONAL_CDB_BYTES_8 … #define SOP_ADDITIONAL_CDB_BYTES_12 … #define SOP_ADDITIONAL_CDB_BYTES_16 … /* * The purpose of this structure is to obtain proper alignment of objects in * an admin queue pair. */ struct pqi_admin_queues_aligned { … }; struct pqi_admin_queues { … }; struct pqi_queue_group { … }; struct pqi_event_queue { … }; #define PQI_DEFAULT_QUEUE_GROUP … #define PQI_MAX_QUEUE_GROUPS … struct pqi_encryption_info { … }; #pragma pack(1) #define PQI_CONFIG_TABLE_SIGNATURE … #define PQI_CONFIG_TABLE_MAX_LENGTH … /* configuration table section IDs */ #define PQI_CONFIG_TABLE_ALL_SECTIONS … #define PQI_CONFIG_TABLE_SECTION_GENERAL_INFO … #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES … #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_ERRATA … #define PQI_CONFIG_TABLE_SECTION_DEBUG … #define PQI_CONFIG_TABLE_SECTION_HEARTBEAT … #define PQI_CONFIG_TABLE_SECTION_SOFT_RESET … struct pqi_config_table { … }; struct pqi_config_table_section_header { … }; struct pqi_config_table_general_info { … }; struct pqi_config_table_firmware_features { … }; #define PQI_FIRMWARE_FEATURE_OFA … #define PQI_FIRMWARE_FEATURE_SMP … #define PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE … #define PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS … #define PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS … #define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE … #define PQI_FIRMWARE_FEATURE_UNIQUE_SATA_WWN … #define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT … #define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT … #define PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME … #define PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN … #define PQI_FIRMWARE_FEATURE_FW_TRIAGE … #define PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5 … #define PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT … #define PQI_FIRMWARE_FEATURE_MAXIMUM … struct pqi_config_table_debug { … }; struct pqi_config_table_heartbeat { … }; struct pqi_config_table_soft_reset { … }; #define PQI_SOFT_RESET_INITIATE … #define PQI_SOFT_RESET_ABORT … enum pqi_soft_reset_status { … }; pqi_reset_register; #define PQI_RESET_ACTION_RESET … #define PQI_RESET_TYPE_NO_RESET … #define PQI_RESET_TYPE_SOFT_RESET … #define PQI_RESET_TYPE_FIRM_RESET … #define PQI_RESET_TYPE_HARD_RESET … #define PQI_RESET_ACTION_COMPLETED … #define PQI_RESET_POLL_INTERVAL_MSECS … #define PQI_MAX_OUTSTANDING_REQUESTS … #define PQI_MAX_OUTSTANDING_REQUESTS_KDUMP … #define PQI_MAX_TRANSFER_SIZE … #define PQI_MAX_TRANSFER_SIZE_KDUMP … #define RAID_MAP_MAX_ENTRIES … #define RAID_MAP_MAX_DATA_DISKS_PER_ROW … #define PQI_PHYSICAL_DEVICE_BUS … #define PQI_RAID_VOLUME_BUS … #define PQI_HBA_BUS … #define PQI_EXTERNAL_RAID_VOLUME_BUS … #define PQI_MAX_BUS … #define PQI_VSEP_CISS_BTL … struct report_lun_header { … }; /* for flags field of struct report_lun_header */ #define CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID … #define CISS_REPORT_LOG_FLAG_QUEUE_DEPTH … #define CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX … #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2 … #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4 … #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK … struct report_log_lun { … }; struct report_log_lun_list { … }; struct report_phys_lun_8byte_wwid { … }; struct report_phys_lun_16byte_wwid { … }; /* for device_flags field of struct report_phys_lun_extended_entry */ #define CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED … struct report_phys_lun_8byte_wwid_list { … }; struct report_phys_lun_16byte_wwid_list { … }; struct raid_map_disk_data { … }; /* for flags field of RAID map */ #define RAID_MAP_ENCRYPTION_ENABLED … struct raid_map { … }; #pragma pack() struct pqi_scsi_dev_raid_map_data { … }; #define RAID_CTLR_LUNID … #define NUM_STREAMS_PER_LUN … struct pqi_stream_data { … }; #define PQI_MAX_LUNS_PER_DEVICE … struct pqi_tmf_work { … }; struct pqi_scsi_dev { … }; /* VPD inquiry pages */ #define CISS_VPD_LV_DEVICE_GEOMETRY … #define CISS_VPD_LV_BYPASS_STATUS … #define CISS_VPD_LV_STATUS … #define VPD_PAGE … #pragma pack(1) /* structure for CISS_VPD_LV_STATUS */ struct ciss_vpd_logical_volume_status { … }; #pragma pack() /* constants for volume_status field of ciss_vpd_logical_volume_status */ #define CISS_LV_OK … #define CISS_LV_FAILED … #define CISS_LV_NOT_CONFIGURED … #define CISS_LV_DEGRADED … #define CISS_LV_READY_FOR_RECOVERY … #define CISS_LV_UNDERGOING_RECOVERY … #define CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED … #define CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM … #define CISS_LV_HARDWARE_OVERHEATING … #define CISS_LV_HARDWARE_HAS_OVERHEATED … #define CISS_LV_UNDERGOING_EXPANSION … #define CISS_LV_NOT_AVAILABLE … #define CISS_LV_QUEUED_FOR_EXPANSION … #define CISS_LV_DISABLED_SCSI_ID_CONFLICT … #define CISS_LV_EJECTED … #define CISS_LV_UNDERGOING_ERASE … /* state 16 not used */ #define CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD … #define CISS_LV_UNDERGOING_RPI … #define CISS_LV_PENDING_RPI … #define CISS_LV_ENCRYPTED_NO_KEY … /* state 21 not used */ #define CISS_LV_UNDERGOING_ENCRYPTION … #define CISS_LV_UNDERGOING_ENCRYPTION_REKEYING … #define CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER … #define CISS_LV_PENDING_ENCRYPTION … #define CISS_LV_PENDING_ENCRYPTION_REKEYING … #define CISS_LV_NOT_SUPPORTED … #define CISS_LV_STATUS_UNAVAILABLE … /* constants for flags field of ciss_vpd_logical_volume_status */ #define CISS_LV_FLAGS_NO_HOST_IO … /* host I/O */ /* for SAS hosts and SAS expanders */ struct pqi_sas_node { … }; struct pqi_sas_port { … }; struct pqi_sas_phy { … }; struct pqi_io_request { … }; #define PQI_NUM_SUPPORTED_EVENTS … struct pqi_event { … }; #define PQI_RESERVED_IO_SLOTS_LUN_RESET … #define PQI_RESERVED_IO_SLOTS_EVENT_ACK … #define PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS … #define PQI_RESERVED_IO_SLOTS … #define PQI_CTRL_PRODUCT_ID_GEN1 … #define PQI_CTRL_PRODUCT_ID_GEN2 … #define PQI_CTRL_PRODUCT_REVISION_A … #define PQI_CTRL_PRODUCT_REVISION_B … enum pqi_ctrl_removal_state { … }; struct pqi_ctrl_info { … }; enum pqi_ctrl_mode { … }; /* * assume worst case: SATA queue depth of 31 minus 4 internal firmware commands */ #define PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH … /* CISS commands */ #define CISS_READ … #define CISS_REPORT_LOG … #define CISS_REPORT_PHYS … #define CISS_GET_RAID_MAP … /* BMIC commands */ #define BMIC_IDENTIFY_CONTROLLER … #define BMIC_IDENTIFY_PHYSICAL_DEVICE … #define BMIC_READ … #define BMIC_WRITE … #define BMIC_SENSE_FEATURE … #define BMIC_SENSE_CONTROLLER_PARAMETERS … #define BMIC_SENSE_SUBSYSTEM_INFORMATION … #define BMIC_CSMI_PASSTHRU … #define BMIC_WRITE_HOST_WELLNESS … #define BMIC_FLUSH_CACHE … #define BMIC_SET_DIAG_OPTIONS … #define BMIC_SENSE_DIAG_OPTIONS … #define CSMI_CC_SAS_SMP_PASSTHRU … #define SA_FLUSH_CACHE … #define MASKED_DEVICE(lunid) … #define CISS_GET_LEVEL_2_BUS(lunid) … #define CISS_GET_LEVEL_2_TARGET(lunid) … #define CISS_GET_DRIVE_NUMBER(lunid) … #define LV_GET_DRIVE_TYPE_MIX(lunid) … #define LV_DRIVE_TYPE_MIX_UNKNOWN … #define LV_DRIVE_TYPE_MIX_NO_RESTRICTION … #define LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY … #define LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY … #define LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY … #define LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY … #define LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY … #define LV_DRIVE_TYPE_MIX_SAS_ONLY … #define LV_DRIVE_TYPE_MIX_SATA_ONLY … #define LV_DRIVE_TYPE_MIX_NVME_ONLY … #define NO_TIMEOUT … #pragma pack(1) struct bmic_identify_controller { … }; /* constants for extra_controller_flags field of bmic_identify_controller */ #define BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED … struct bmic_sense_subsystem_info { … }; /* constants for device_type field */ #define SA_DEVICE_TYPE_SATA … #define SA_DEVICE_TYPE_SAS … #define SA_DEVICE_TYPE_EXPANDER_SMP … #define SA_DEVICE_TYPE_SES … #define SA_DEVICE_TYPE_CONTROLLER … #define SA_DEVICE_TYPE_NVME … struct bmic_identify_physical_device { … }; #define BMIC_SENSE_FEATURE_IO_PAGE … #define BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE … struct bmic_sense_feature_buffer_header { … }; struct bmic_sense_feature_page_header { … }; struct bmic_sense_feature_io_page_aio_subpage { … }; struct bmic_smp_request { … }; struct bmic_smp_response { … }; struct bmic_csmi_ioctl_header { … }; struct bmic_csmi_smp_passthru { … }; struct bmic_csmi_smp_passthru_buffer { … }; struct bmic_flush_cache { … }; /* for shutdown_event member of struct bmic_flush_cache */ enum bmic_flush_cache_shutdown_event { … }; struct bmic_diag_options { … }; #pragma pack() static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost) { … } void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost, struct sas_rphy *rphy); int pqi_add_sas_host(struct Scsi_Host *shost, struct pqi_ctrl_info *ctrl_info); void pqi_delete_sas_host(struct pqi_ctrl_info *ctrl_info); int pqi_add_sas_device(struct pqi_sas_node *pqi_sas_node, struct pqi_scsi_dev *device); void pqi_remove_sas_device(struct pqi_scsi_dev *device); struct pqi_scsi_dev *pqi_find_device_by_sas_rphy( struct pqi_ctrl_info *ctrl_info, struct sas_rphy *rphy); void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd); int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, struct pqi_raid_error_info *error_info); extern struct sas_function_template pqi_sas_transport_functions; #endif /* _SMARTPQI_H */
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