/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2016-2023 Broadcom Inc. All rights reserved. */ #ifndef MPI30_IOC_H #define MPI30_IOC_H … struct mpi3_ioc_init_request { … }; #define MPI3_IOCINIT_MSGFLAGS_WRITESAMEDIVERT_SUPPORTED … #define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED … #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK … #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED … #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED … #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE … #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH … #define MPI3_WHOINIT_NOT_INITIALIZED … #define MPI3_WHOINIT_ROM_BIOS … #define MPI3_WHOINIT_HOST_DRIVER … #define MPI3_WHOINIT_MANUFACTURER … struct mpi3_ioc_facts_request { … }; struct mpi3_ioc_facts_data { … }; #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK … #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC … #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC … #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK … #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD … #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO … #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_RAID_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_SUPPORTED … #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED … #define MPI3_IOCFACTS_PID_TYPE_MASK … #define MPI3_IOCFACTS_PID_TYPE_SHIFT … #define MPI3_IOCFACTS_PID_PRODUCT_MASK … #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT … #define MPI3_IOCFACTS_PID_FAMILY_MASK … #define MPI3_IOCFACTS_PID_FAMILY_SHIFT … #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY … #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED … #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB … #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB … #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED … #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE … #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL … #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL … #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL … #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK … #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY … #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY … #define MPI3_IOCFACTS_PROTOCOL_SAS … #define MPI3_IOCFACTS_PROTOCOL_SATA … #define MPI3_IOCFACTS_PROTOCOL_NVME … #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR … #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET … #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED … #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED … #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK … #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT … #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK … #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED … #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS … #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE … #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK … #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA … #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR … #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED … #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED … #define MPI3_IOCFACTS_DIAGFDLSIZE_NOT_SUPPORTED … #define MPI3_IOCFACTS_DIAGTTYSIZE_NOT_SUPPORTED … struct mpi3_mgmt_passthrough_request { … }; struct mpi3_create_request_queue_request { … }; #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK … #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED … #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS … #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM … struct mpi3_delete_request_queue_request { … }; struct mpi3_create_reply_queue_request { … }; #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE … #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE … #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM … struct mpi3_delete_reply_queue_request { … }; struct mpi3_port_enable_request { … }; #define MPI3_EVENT_LOG_DATA … #define MPI3_EVENT_CHANGE … #define MPI3_EVENT_GPIO_INTERRUPT … #define MPI3_EVENT_CABLE_MGMT … #define MPI3_EVENT_DEVICE_ADDED … #define MPI3_EVENT_DEVICE_INFO_CHANGED … #define MPI3_EVENT_PREPARE_FOR_RESET … #define MPI3_EVENT_COMP_IMAGE_ACT_START … #define MPI3_EVENT_ENCL_DEVICE_ADDED … #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE … #define MPI3_EVENT_DEVICE_STATUS_CHANGE … #define MPI3_EVENT_ENERGY_PACK_CHANGE … #define MPI3_EVENT_SAS_DISCOVERY … #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE … #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE … #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE … #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW … #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST … #define MPI3_EVENT_SAS_PHY_COUNTER … #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR … #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST … #define MPI3_EVENT_PCIE_ENUMERATION … #define MPI3_EVENT_PCIE_ERROR_THRESHOLD … #define MPI3_EVENT_HARD_RESET_RECEIVED … #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE … #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC … #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC … #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS … struct mpi3_event_notification_request { … }; struct mpi3_event_notification_reply { … }; #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK … #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED … #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED … #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK … #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL … #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY … struct mpi3_event_data_gpio_interrupt { … }; struct mpi3_event_data_cable_management { … }; #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID … #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER … #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT … #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED … struct mpi3_event_ack_request { … }; struct mpi3_event_data_prepare_for_reset { … }; #define MPI3_EVENT_PREPARE_RESET_RC_START … #define MPI3_EVENT_PREPARE_RESET_RC_ABORT … struct mpi3_event_data_comp_image_activation { … }; struct mpi3_event_data_device_status_change { … }; #define MPI3_EVENT_DEV_STAT_RC_MOVED … #define MPI3_EVENT_DEV_STAT_RC_HIDDEN … #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN … #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION … #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT … #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP … #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT … #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP … #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT … #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP … #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED … #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT … #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP … #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING … struct mpi3_event_data_energy_pack_change { … }; struct mpi3_event_data_sas_discovery { … }; #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE … #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS … #define MPI3_EVENT_SAS_DISC_RC_STARTED … #define MPI3_EVENT_SAS_DISC_RC_COMPLETED … #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED … #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED … #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED … #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED … #define MPI3_SAS_DISC_STATUS_INVALID_CEI … #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH … #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT … #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH … #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS … #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE … #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN … #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK … #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE … #define MPI3_SAS_DISC_STATUS_TABLE_LINK … #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK … #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR … #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED … #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT … #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS … #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS … #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED … struct mpi3_event_data_sas_broadcast_primitive { … }; #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE … #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES … #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER … #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT … #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3 … #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4 … #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED … #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED … struct mpi3_event_data_sas_notify_primitive { … }; #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP … #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED … #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1 … #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2 … #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT #define MPI3_EVENT_SAS_TOPO_PHY_COUNT … #endif struct mpi3_event_sas_topo_phy_entry { … }; #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK … #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT … #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK … #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT … #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE … #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED … #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED … #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE … #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR … #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS … #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY … #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0 … #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0 … #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5 … #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK … #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT … #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE … #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST … #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT … #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK … #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING … #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED … #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE … #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING … #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING … struct mpi3_event_data_sas_topology_change_list { … }; #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER … #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING … #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING … #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING … struct mpi3_event_data_sas_phy_counter { … }; struct mpi3_event_data_sas_device_disc_err { … }; #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED … #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT … struct mpi3_event_data_pcie_enumeration { … }; #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE … #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS … #define MPI3_EVENT_PCIE_ENUM_RC_STARTED … #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED … #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED … #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED … #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED … #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED … #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT … #endif struct mpi3_event_pcie_topo_port_entry { … }; #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING … #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED … #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE … #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING … #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1 … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2 … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4 … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8 … #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16 … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5 … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0 … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0 … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0 … #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0 … struct mpi3_event_data_pcie_topology_change_list { … }; #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH … #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING … #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING … #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING … struct mpi3_event_data_pcie_error_threshold { … }; #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED … #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION … struct mpi3_event_data_sas_init_dev_status_change { … }; #define MPI3_EVENT_SAS_INIT_RC_ADDED … #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING … struct mpi3_event_data_sas_init_table_overflow { … }; struct mpi3_event_data_hard_reset_received { … }; struct mpi3_event_data_diag_buffer_status_change { … }; #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED … #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED … #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED … #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT … #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT … #define MPI3_PEL_LOCALE_FLAGS_PCIE … #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION … #define MPI3_PEL_LOCALE_FLAGS_CONTROLER … #define MPI3_PEL_LOCALE_FLAGS_SAS … #define MPI3_PEL_LOCALE_FLAGS_EPACK … #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE … #define MPI3_PEL_LOCALE_FLAGS_PD … #define MPI3_PEL_LOCALE_FLAGS_VD … #define MPI3_PEL_CLASS_DEBUG … #define MPI3_PEL_CLASS_PROGRESS … #define MPI3_PEL_CLASS_INFORMATIONAL … #define MPI3_PEL_CLASS_WARNING … #define MPI3_PEL_CLASS_CRITICAL … #define MPI3_PEL_CLASS_FATAL … #define MPI3_PEL_CLASS_FAULT … #define MPI3_PEL_CLEARTYPE_CLEAR … #define MPI3_PEL_WAITTIME_INFINITE_WAIT … #define MPI3_PEL_ACTION_GET_SEQNUM … #define MPI3_PEL_ACTION_MARK_CLEAR … #define MPI3_PEL_ACTION_GET_LOG … #define MPI3_PEL_ACTION_GET_COUNT … #define MPI3_PEL_ACTION_WAIT … #define MPI3_PEL_ACTION_ABORT … #define MPI3_PEL_ACTION_GET_PRINT_STRINGS … #define MPI3_PEL_ACTION_ACKNOWLEDGE … #define MPI3_PEL_STATUS_SUCCESS … #define MPI3_PEL_STATUS_NOT_FOUND … #define MPI3_PEL_STATUS_ABORTED … #define MPI3_PEL_STATUS_NOT_READY … struct mpi3_pel_seq { … }; struct mpi3_pel_entry { … }; #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED … #define MPI3_PEL_FLAGS_ACK_NEEDED … struct mpi3_pel_list { … }; struct mpi3_pel_arg_map { … }; #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING … #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER … #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING … #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD … struct mpi3_pel_print_string { … }; struct mpi3_pel_print_string_list { … }; #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX #define MPI3_PEL_ACTION_SPECIFIC_MAX … #endif struct mpi3_pel_request { … }; struct mpi3_pel_req_action_get_sequence_numbers { … }; struct mpi3_pel_req_action_clear_log_marker { … }; struct mpi3_pel_req_action_get_log { … }; struct mpi3_pel_req_action_get_count { … }; struct mpi3_pel_req_action_wait { … }; struct mpi3_pel_req_action_abort { … }; struct mpi3_pel_req_action_get_print_strings { … }; struct mpi3_pel_req_action_acknowledge { … }; #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK … #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE … #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP … #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT … struct mpi3_pel_reply { … }; struct mpi3_ci_download_request { … }; #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT … #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE … #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA … #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK … #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST … #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM … #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW … #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD … #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION … #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION … #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS … #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION … struct mpi3_ci_download_reply { … }; #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE … #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED … #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING … #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING … #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE … struct mpi3_ci_upload_request { … }; #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK … #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY … #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY … #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK … #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH … #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE … #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY … #define MPI3_CTRL_OP_LOOKUP_MAPPING … #define MPI3_CTRL_OP_UPDATE_TIMESTAMP … #define MPI3_CTRL_OP_GET_TIMESTAMP … #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT … #define MPI3_CTRL_OP_CHANGE_PROFILE … #define MPI3_CTRL_OP_REMOVE_DEVICE … #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION … #define MPI3_CTRL_OP_HIDDEN_ACK … #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS … #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE … #define MPI3_CTRL_OP_SAS_PHY_CONTROL … #define MPI3_CTRL_OP_READ_INTERNAL_BUS … #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS … #define MPI3_CTRL_OP_PCIE_LINK_CONTROL … #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX … #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX … #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX … #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX … #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX … #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX … #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX … #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX … #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX … #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX … #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX … #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX … #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX … #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX … #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX … #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX … #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS … #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT … #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME … #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID … #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX … #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX … #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX … #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX … #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX … #define MPI3_CTRL_PRIMFLAGS_SINGLE … #define MPI3_CTRL_PRIMFLAGS_TRIPLE … #define MPI3_CTRL_PRIMFLAGS_REDUNDANT … #define MPI3_CTRL_ACTION_NOP … #define MPI3_CTRL_ACTION_LINK_RESET … #define MPI3_CTRL_ACTION_HARD_RESET … #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG … struct mpi3_iounit_control_request { … }; struct mpi3_iounit_control_reply { … }; #endif
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