// SPDX-License-Identifier: GPL-2.0-only /* * * Copyright (C) 2012 John Crispin <[email protected]> */ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/init.h> #include <linux/module.h> #include <linux/types.h> #include <linux/of.h> #include <linux/mutex.h> #include <linux/gpio/driver.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> /* * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a * peripheral controller used to drive external shift register cascades. At most * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem * to drive the 2 LSBs of the cascade automatically. */ /* control register 0 */ #define XWAY_STP_CON0 … /* control register 1 */ #define XWAY_STP_CON1 … /* data register 0 */ #define XWAY_STP_CPU0 … /* data register 1 */ #define XWAY_STP_CPU1 … /* access register */ #define XWAY_STP_AR … /* software or hardware update select bit */ #define XWAY_STP_CON_SWU … /* automatic update rates */ #define XWAY_STP_2HZ … #define XWAY_STP_4HZ … #define XWAY_STP_8HZ … #define XWAY_STP_10HZ … #define XWAY_STP_SPEED_MASK … #define XWAY_STP_FPIS_VALUE … #define XWAY_STP_FPIS_MASK … /* clock source for automatic update */ #define XWAY_STP_UPD_FPI … #define XWAY_STP_UPD_MASK … /* let the adsl core drive the 2 LSBs */ #define XWAY_STP_ADSL_SHIFT … #define XWAY_STP_ADSL_MASK … /* 2 groups of 3 bits can be driven by the phys */ #define XWAY_STP_PHY_MASK … #define XWAY_STP_PHY1_SHIFT … #define XWAY_STP_PHY2_SHIFT … #define XWAY_STP_PHY3_SHIFT … #define XWAY_STP_PHY4_SHIFT … /* STP has 3 groups of 8 bits */ #define XWAY_STP_GROUP0 … #define XWAY_STP_GROUP1 … #define XWAY_STP_GROUP2 … #define XWAY_STP_GROUP_MASK … /* Edge configuration bits */ #define XWAY_STP_FALLING … #define XWAY_STP_EDGE_MASK … #define xway_stp_r32(m, reg) … #define xway_stp_w32(m, val, reg) … #define xway_stp_w32_mask(m, clear, set, reg) … struct xway_stp { … }; /** * xway_stp_get() - gpio_chip->get - get gpios. * @gc: Pointer to gpio_chip device structure. * @gpio: GPIO signal number. * * Gets the shadow value. */ static int xway_stp_get(struct gpio_chip *gc, unsigned int gpio) { … } /** * xway_stp_set() - gpio_chip->set - set gpios. * @gc: Pointer to gpio_chip device structure. * @gpio: GPIO signal number. * @val: Value to be written to specified signal. * * Set the shadow value and call ltq_ebu_apply. */ static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val) { … } /** * xway_stp_dir_out() - gpio_chip->dir_out - set gpio direction. * @gc: Pointer to gpio_chip device structure. * @gpio: GPIO signal number. * @val: Value to be written to specified signal. * * Same as xway_stp_set, always returns 0. */ static int xway_stp_dir_out(struct gpio_chip *gc, unsigned gpio, int val) { … } /** * xway_stp_request() - gpio_chip->request * @gc: Pointer to gpio_chip device structure. * @gpio: GPIO signal number. * * We mask out the HW driven pins */ static int xway_stp_request(struct gpio_chip *gc, unsigned gpio) { … } /** * xway_stp_hw_init() - Configure the STP unit and enable the clock gate * @chip: Pointer to the xway_stp chip structure */ static void xway_stp_hw_init(struct xway_stp *chip) { … } static int xway_stp_probe(struct platform_device *pdev) { … } static const struct of_device_id xway_stp_match[] = …; MODULE_DEVICE_TABLE(of, xway_stp_match); static struct platform_driver xway_stp_driver = …; static int __init xway_stp_init(void) { … } subsys_initcall(xway_stp_init);
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