/* * Disk Array driver for HP Smart Array SAS controllers * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries * Copyright 2016 Microsemi Corporation * Copyright 2014-2015 PMC-Sierra, Inc. * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for more details. * * Questions/Comments/Bugfixes to [email protected] * */ #ifndef HPSA_CMD_H #define HPSA_CMD_H #include <linux/compiler.h> #include <linux/build_bug.h> /* static_assert */ #include <linux/stddef.h> /* offsetof */ /* general boundary defintions */ #define SENSEINFOBYTES … #define SG_ENTRIES_IN_CMD … #define HPSA_SG_CHAIN … #define HPSA_SG_LAST … #define MAXREPLYQS … /* Command Status value */ #define CMD_SUCCESS … #define CMD_TARGET_STATUS … #define CMD_DATA_UNDERRUN … #define CMD_DATA_OVERRUN … #define CMD_INVALID … #define CMD_PROTOCOL_ERR … #define CMD_HARDWARE_ERR … #define CMD_CONNECTION_LOST … #define CMD_ABORTED … #define CMD_ABORT_FAILED … #define CMD_UNSOLICITED_ABORT … #define CMD_TIMEOUT … #define CMD_UNABORTABLE … #define CMD_TMF_STATUS … #define CMD_IOACCEL_DISABLED … #define CMD_CTLR_LOCKUP … /* Note: CMD_CTLR_LOCKUP is not a value defined by the CISS spec * it is a value defined by the driver that commands can be marked * with when a controller lockup has been detected by the driver */ /* TMF function status values */ #define CISS_TMF_COMPLETE … #define CISS_TMF_INVALID_FRAME … #define CISS_TMF_NOT_SUPPORTED … #define CISS_TMF_FAILED … #define CISS_TMF_SUCCESS … #define CISS_TMF_WRONG_LUN … #define CISS_TMF_OVERLAPPED_TAG … /* Unit Attentions ASC's as defined for the MSA2012sa */ #define POWER_OR_RESET … #define STATE_CHANGED … #define UNIT_ATTENTION_CLEARED … #define LUN_FAILED … #define REPORT_LUNS_CHANGED … /* Unit Attentions ASCQ's as defined for the MSA2012sa */ /* These ASCQ's defined for ASC = POWER_OR_RESET */ #define POWER_ON_RESET … #define POWER_ON_REBOOT … #define SCSI_BUS_RESET … #define MSA_TARGET_RESET … #define CONTROLLER_FAILOVER … #define TRANSCEIVER_SE … #define TRANSCEIVER_LVD … /* These ASCQ's defined for ASC = STATE_CHANGED */ #define RESERVATION_PREEMPTED … #define ASYM_ACCESS_CHANGED … #define LUN_CAPACITY_CHANGED … /* transfer direction */ #define XFER_NONE … #define XFER_WRITE … #define XFER_READ … #define XFER_RSVD … /* task attribute */ #define ATTR_UNTAGGED … #define ATTR_SIMPLE … #define ATTR_HEADOFQUEUE … #define ATTR_ORDERED … #define ATTR_ACA … /* cdb type */ #define TYPE_CMD … #define TYPE_MSG … #define TYPE_IOACCEL2_CMD … /* Message Types */ #define HPSA_TASK_MANAGEMENT … #define HPSA_RESET … #define HPSA_SCAN … #define HPSA_NOOP … #define HPSA_CTLR_RESET_TYPE … #define HPSA_BUS_RESET_TYPE … #define HPSA_TARGET_RESET_TYPE … #define HPSA_LUN_RESET_TYPE … #define HPSA_NEXUS_RESET_TYPE … /* Task Management Functions */ #define HPSA_TMF_ABORT_TASK … #define HPSA_TMF_ABORT_TASK_SET … #define HPSA_TMF_CLEAR_ACA … #define HPSA_TMF_CLEAR_TASK_SET … #define HPSA_TMF_QUERY_TASK … #define HPSA_TMF_QUERY_TASK_SET … #define HPSA_TMF_QUERY_ASYNCEVENT … /* config space register offsets */ #define CFG_VENDORID … #define CFG_DEVICEID … #define CFG_I2OBAR … #define CFG_MEM1BAR … /* i2o space register offsets */ #define I2O_IBDB_SET … #define I2O_IBDB_CLEAR … #define I2O_INT_STATUS … #define I2O_INT_MASK … #define I2O_IBPOST_Q … #define I2O_OBPOST_Q … #define I2O_DMA1_CFG … /* Configuration Table */ #define CFGTBL_ChangeReq … #define CFGTBL_AccCmds … #define DOORBELL_CTLR_RESET … #define DOORBELL_CTLR_RESET2 … #define DOORBELL_CLEAR_EVENTS … #define DOORBELL_GENERATE_CHKPT … #define CFGTBL_Trans_Simple … #define CFGTBL_Trans_Performant … #define CFGTBL_Trans_io_accel1 … #define CFGTBL_Trans_io_accel2 … #define CFGTBL_Trans_use_short_tags … #define CFGTBL_Trans_enable_directed_msix … #define CFGTBL_BusType_Ultra2 … #define CFGTBL_BusType_Ultra3 … #define CFGTBL_BusType_Fibre1G … #define CFGTBL_BusType_Fibre2G … /* VPD Inquiry types */ #define HPSA_INQUIRY_FAILED … #define HPSA_VPD_SUPPORTED_PAGES … #define HPSA_VPD_LV_DEVICE_ID … #define HPSA_VPD_LV_DEVICE_GEOMETRY … #define HPSA_VPD_LV_IOACCEL_STATUS … #define HPSA_VPD_LV_STATUS … #define HPSA_VPD_HEADER_SZ … /* Logical volume states */ #define HPSA_VPD_LV_STATUS_UNSUPPORTED … #define HPSA_LV_OK … #define HPSA_LV_FAILED … #define HPSA_LV_NOT_AVAILABLE … #define HPSA_LV_UNDERGOING_ERASE … #define HPSA_LV_UNDERGOING_RPI … #define HPSA_LV_PENDING_RPI … #define HPSA_LV_ENCRYPTED_NO_KEY … #define HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER … #define HPSA_LV_UNDERGOING_ENCRYPTION … #define HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING … #define HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER … #define HPSA_LV_PENDING_ENCRYPTION … #define HPSA_LV_PENDING_ENCRYPTION_REKEYING … struct vals32 { … }; u64bit; /* FIXME this is a per controller value (barf!) */ #define HPSA_MAX_LUN … #define HPSA_MAX_PHYS_LUN … #define MAX_EXT_TARGETS … #define HPSA_MAX_DEVICES … /* SCSI-3 Commands */ #define HPSA_INQUIRY … struct InquiryData { … } __packed; #define HPSA_REPORT_LOG … #define HPSA_REPORT_PHYS … #define HPSA_REPORT_PHYS_EXTENDED … #define HPSA_CISS_READ … #define HPSA_GET_RAID_MAP … #define RAID_MAP_MAX_ENTRIES … struct raid_map_disk_data { … } __packed; struct raid_map_data { … } __packed; struct ReportLUNdata { … } __packed; struct ext_report_lun_entry { … } __packed; struct ReportExtendedLUNdata { … } __packed; struct SenseSubsystem_info { … } __packed; /* BMIC commands */ #define BMIC_READ … #define BMIC_WRITE … #define BMIC_CACHE_FLUSH … #define HPSA_CACHE_FLUSH … #define BMIC_FLASH_FIRMWARE … #define BMIC_SENSE_CONTROLLER_PARAMETERS … #define BMIC_IDENTIFY_PHYSICAL_DEVICE … #define BMIC_IDENTIFY_CONTROLLER … #define BMIC_SET_DIAG_OPTIONS … #define BMIC_SENSE_DIAG_OPTIONS … #define HPSA_DIAG_OPTS_DISABLE_RLD_CACHING … #define BMIC_SENSE_SUBSYSTEM_INFORMATION … #define BMIC_SENSE_STORAGE_BOX_PARAMS … /* Command List Structure */ SCSI3Addr __packed; struct PhysDevAddr { … } __packed; struct LogDevAddr { … } __packed; LUNAddr __packed; struct CommandListHeader { … } __packed; struct RequestBlock { … } __packed; struct ErrDescriptor { … } __packed; struct SGDescriptor { … } __packed; MoreErrInfo __packed; struct ErrorInfo { … } __packed; /* Command types */ #define CMD_IOCTL_PEND … #define CMD_SCSI … #define CMD_IOACCEL1 … #define CMD_IOACCEL2 … #define IOACCEL2_TMF … #define DIRECT_LOOKUP_SHIFT … #define DIRECT_LOOKUP_MASK … #define HPSA_ERROR_BIT … struct ctlr_info; /* defined in hpsa.h */ /* The size of this structure needs to be divisible by 128 * on all architectures. The low 4 bits of the addresses * are used as follows: * * bit 0: to device, used to indicate "performant mode" command * from device, indidcates error status. * bit 1-3: to device, indicates block fetch table entry for * reducing DMA in fetching commands from host memory. */ #define COMMANDLIST_ALIGNMENT … struct CommandList { … } __aligned(…); /* * Make sure our embedded atomic variable is aligned. Otherwise we break atomic * operations on architectures that don't support unaligned atomics like IA64. * * The assert guards against reintroductin against unwanted __packed to * the struct CommandList. */ static_assert(…); /* Max S/G elements in I/O accelerator command */ #define IOACCEL1_MAXSGENTRIES … #define IOACCEL2_MAXSGENTRIES … /* * Structure for I/O accelerator (mode 1) commands. * Note that this structure must be 128-byte aligned in size. */ #define IOACCEL1_COMMANDLIST_ALIGNMENT … struct io_accel1_cmd { … } __packed __aligned(…); #define IOACCEL1_FUNCTION_SCSIIO … #define IOACCEL1_SGLOFFSET … #define IOACCEL1_IOFLAGS_IO_REQ … #define IOACCEL1_IOFLAGS_CDBLEN_MASK … #define IOACCEL1_IOFLAGS_CDBLEN_MAX … #define IOACCEL1_CONTROL_NODATAXFER … #define IOACCEL1_CONTROL_DATA_OUT … #define IOACCEL1_CONTROL_DATA_IN … #define IOACCEL1_CONTROL_TASKPRIO_MASK … #define IOACCEL1_CONTROL_TASKPRIO_SHIFT … #define IOACCEL1_CONTROL_SIMPLEQUEUE … #define IOACCEL1_CONTROL_HEADOFQUEUE … #define IOACCEL1_CONTROL_ORDEREDQUEUE … #define IOACCEL1_CONTROL_ACA … #define IOACCEL1_HCFLAGS_CISS_FORMAT … #define IOACCEL1_BUSADDR_CMDTYPE … struct ioaccel2_sg_element { … } __packed; /* * SCSI Response Format structure for IO Accelerator Mode 2 */ struct io_accel2_scsi_response { … } __packed; /* * Structure for I/O accelerator (mode 2 or m2) commands. * Note that this structure must be 128-byte aligned in size. */ #define IOACCEL2_COMMANDLIST_ALIGNMENT … struct io_accel2_cmd { … } __packed __aligned(…); /* * defines for Mode 2 command struct * FIXME: this can't be all I need mfm */ #define IOACCEL2_IU_TYPE … #define IOACCEL2_IU_TMF_TYPE … #define IOACCEL2_DIR_NO_DATA … #define IOACCEL2_DIR_DATA_IN … #define IOACCEL2_DIR_DATA_OUT … #define IOACCEL2_TMF_ABORT … /* * SCSI Task Management Request format for Accelerator Mode 2 */ struct hpsa_tmf_struct { … } __packed __aligned(…); /* Configuration Table Structure */ struct HostWrite { … } __packed; #define SIMPLE_MODE … #define PERFORMANT_MODE … #define MEMQ_MODE … #define IOACCEL_MODE_1 … #define DRIVER_SUPPORT_UA_ENABLE … struct CfgTable { … } __packed; #define NUM_BLOCKFETCH_ENTRIES … struct TransTable_struct { … } __packed; struct hpsa_pci_info { … } __packed; struct bmic_identify_controller { … } __packed; struct bmic_identify_physical_device { … } __packed __attribute((aligned …)); struct bmic_sense_subsystem_info { … } __packed; struct bmic_sense_storage_box_params { … } __packed; #endif /* HPSA_CMD_H */
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