linux/drivers/gpio/gpio-tangier.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Intel Tangier GPIO driver
 *
 * Copyright (c) 2016, 2021, 2023 Intel Corporation.
 *
 * Authors: Andy Shevchenko <[email protected]>
 *          Pandith N <[email protected]>
 *          Raag Jadav <[email protected]>
 */

#include <linux/bitops.h>
#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/math.h>
#include <linux/module.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pm.h>
#include <linux/spinlock.h>
#include <linux/string_helpers.h>
#include <linux/types.h>

#include <linux/gpio/driver.h>

#include "gpio-tangier.h"

#define GCCR
#define GPLR
#define GPDR
#define GPSR
#define GPCR
#define GRER
#define GFER
#define GFBR
#define GIMR
#define GISR
#define GITR
#define GLPR

/**
 * struct tng_gpio_context - Context to be saved during suspend-resume
 * @level: Pin level
 * @gpdr: Pin direction
 * @grer: Rising edge detect enable
 * @gfer: Falling edge detect enable
 * @gimr: Interrupt mask
 * @gwmr: Wake mask
 */
struct tng_gpio_context {};

static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset,
			      unsigned int reg)
{}

static void __iomem *gpio_reg_and_bit(struct gpio_chip *chip, unsigned int offset,
				      unsigned int reg, u8 *bit)
{}

static int tng_gpio_get(struct gpio_chip *chip, unsigned int offset)
{}

static void tng_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
{}

static int tng_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
{}

static int tng_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
				     int value)
{}

static int tng_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
{}

static int tng_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
				 unsigned int debounce)
{}

static int tng_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
			       unsigned long config)
{}

static void tng_irq_ack(struct irq_data *d)
{}

static void tng_irq_unmask_mask(struct tng_gpio *priv, u32 gpio, bool unmask)
{}

static void tng_irq_mask(struct irq_data *d)
{}

static void tng_irq_unmask(struct irq_data *d)
{}

static int tng_irq_set_type(struct irq_data *d, unsigned int type)
{}

static int tng_irq_set_wake(struct irq_data *d, unsigned int on)
{}

static const struct irq_chip tng_irqchip =;

static void tng_irq_handler(struct irq_desc *desc)
{}

static int tng_irq_init_hw(struct gpio_chip *chip)
{}

static int tng_gpio_add_pin_ranges(struct gpio_chip *chip)
{}

int devm_tng_gpio_probe(struct device *dev, struct tng_gpio *gpio)
{}
EXPORT_SYMBOL_NS_GPL();

static int tng_gpio_suspend(struct device *dev)
{}

static int tng_gpio_resume(struct device *dev)
{}

EXPORT_NS_GPL_SIMPLE_DEV_PM_OPS(tng_gpio_pm_ops, tng_gpio_suspend, tng_gpio_resume, GPIO_TANGIER);

MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();