linux/drivers/scsi/myrs.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
 *
 * This driver supports the newer, SCSI-based firmware interface only.
 *
 * Copyright 2017 Hannes Reinecke, SUSE Linux GmbH <[email protected]>
 *
 * Based on the original DAC960 driver, which has
 * Copyright 1998-2001 by Leonard N. Zubkoff <[email protected]>
 * Portions Copyright 2002 by Mylex (An IBM Business Unit)
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/raid_class.h>
#include <asm/unaligned.h>
#include <scsi/scsi.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_tcq.h>
#include "myrs.h"

static struct raid_template *myrs_raid_template;

static struct myrs_devstate_name_entry {} myrs_devstate_name_list[] =;

static char *myrs_devstate_name(enum myrs_devstate state)
{}

static struct myrs_raid_level_name_entry {} myrs_raid_level_name_list[] =;

static char *myrs_raid_level_name(enum myrs_raid_level level)
{}

/*
 * myrs_reset_cmd - clears critical fields in struct myrs_cmdblk
 */
static inline void myrs_reset_cmd(struct myrs_cmdblk *cmd_blk)
{}

/*
 * myrs_qcmd - queues Command for DAC960 V2 Series Controllers.
 */
static void myrs_qcmd(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk)
{}

/*
 * myrs_exec_cmd - executes V2 Command and waits for completion.
 */
static void myrs_exec_cmd(struct myrs_hba *cs,
		struct myrs_cmdblk *cmd_blk)
{}

/*
 * myrs_report_progress - prints progress message
 */
static void myrs_report_progress(struct myrs_hba *cs, unsigned short ldev_num,
		unsigned char *msg, unsigned long blocks,
		unsigned long size)
{}

/*
 * myrs_get_ctlr_info - executes a Controller Information IOCTL Command
 */
static unsigned char myrs_get_ctlr_info(struct myrs_hba *cs)
{}

/*
 * myrs_get_ldev_info - executes a Logical Device Information IOCTL Command
 */
static unsigned char myrs_get_ldev_info(struct myrs_hba *cs,
		unsigned short ldev_num, struct myrs_ldev_info *ldev_info)
{}

/*
 * myrs_get_pdev_info - executes a "Read Physical Device Information" Command
 */
static unsigned char myrs_get_pdev_info(struct myrs_hba *cs,
		unsigned char channel, unsigned char target, unsigned char lun,
		struct myrs_pdev_info *pdev_info)
{}

/*
 * myrs_dev_op - executes a "Device Operation" Command
 */
static unsigned char myrs_dev_op(struct myrs_hba *cs,
		enum myrs_ioctl_opcode opcode, enum myrs_opdev opdev)
{}

/*
 * myrs_translate_pdev - translates a Physical Device Channel and
 * TargetID into a Logical Device.
 */
static unsigned char myrs_translate_pdev(struct myrs_hba *cs,
		unsigned char channel, unsigned char target, unsigned char lun,
		struct myrs_devmap *devmap)
{}

/*
 * myrs_get_event - executes a Get Event Command
 */
static unsigned char myrs_get_event(struct myrs_hba *cs,
		unsigned int event_num, struct myrs_event *event_buf)
{}

/*
 * myrs_get_fwstatus - executes a Get Health Status Command
 */
static unsigned char myrs_get_fwstatus(struct myrs_hba *cs)
{}

/*
 * myrs_enable_mmio_mbox - enables the Memory Mailbox Interface
 */
static bool myrs_enable_mmio_mbox(struct myrs_hba *cs,
		enable_mbox_t enable_mbox_fn)
{}

/*
 * myrs_get_config - reads the Configuration Information
 */
static int myrs_get_config(struct myrs_hba *cs)
{}

/*
 * myrs_log_event - prints a Controller Event message
 */
static struct {} myrs_ev_list[] =;

static void myrs_log_event(struct myrs_hba *cs, struct myrs_event *ev)
{}

/*
 * SCSI sysfs interface functions
 */
static ssize_t raid_state_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}

static ssize_t raid_state_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_RW(raid_state);

static ssize_t raid_level_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(raid_level);

static ssize_t rebuild_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}

static ssize_t rebuild_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_RW(rebuild);

static ssize_t consistency_check_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}

static ssize_t consistency_check_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_RW(consistency_check);

static struct attribute *myrs_sdev_attrs[] =;

ATTRIBUTE_GROUPS();

static ssize_t serial_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(serial);

static ssize_t ctlr_num_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(ctlr_num);

static struct myrs_cpu_type_tbl {} myrs_cpu_type_names[] =;

static ssize_t processor_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(processor);

static ssize_t model_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(model);

static ssize_t ctlr_type_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(ctlr_type);

static ssize_t cache_size_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(cache_size);

static ssize_t firmware_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}
static DEVICE_ATTR_RO(firmware);

static ssize_t discovery_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_WO(discovery);

static ssize_t flush_cache_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_WO(flush_cache);

static ssize_t disable_enclosure_messages_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{}

static ssize_t disable_enclosure_messages_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{}
static DEVICE_ATTR_RW(disable_enclosure_messages);

static struct attribute *myrs_shost_attrs[] =;

ATTRIBUTE_GROUPS();

/*
 * SCSI midlayer interface
 */
static int myrs_host_reset(struct scsi_cmnd *scmd)
{}

static void myrs_mode_sense(struct myrs_hba *cs, struct scsi_cmnd *scmd,
		struct myrs_ldev_info *ldev_info)
{}

static int myrs_queuecommand(struct Scsi_Host *shost,
		struct scsi_cmnd *scmd)
{}

static unsigned short myrs_translate_ldev(struct myrs_hba *cs,
		struct scsi_device *sdev)
{}

static int myrs_slave_alloc(struct scsi_device *sdev)
{}

static int myrs_slave_configure(struct scsi_device *sdev)
{}

static void myrs_slave_destroy(struct scsi_device *sdev)
{}

static const struct scsi_host_template myrs_template =;

static struct myrs_hba *myrs_alloc_host(struct pci_dev *pdev,
		const struct pci_device_id *entry)
{}

/*
 * RAID template functions
 */

/**
 * myrs_is_raid - return boolean indicating device is raid volume
 * @dev: the device struct object
 */
static int
myrs_is_raid(struct device *dev)
{}

/**
 * myrs_get_resync - get raid volume resync percent complete
 * @dev: the device struct object
 */
static void
myrs_get_resync(struct device *dev)
{}

/**
 * myrs_get_state - get raid volume status
 * @dev: the device struct object
 */
static void
myrs_get_state(struct device *dev)
{}

static struct raid_function_template myrs_raid_functions =;

/*
 * PCI interface functions
 */
static void myrs_flush_cache(struct myrs_hba *cs)
{}

static void myrs_handle_scsi(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk,
		struct scsi_cmnd *scmd)
{}

static void myrs_handle_cmdblk(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk)
{}

static void myrs_monitor(struct work_struct *work)
{}

static bool myrs_create_mempools(struct pci_dev *pdev, struct myrs_hba *cs)
{}

static void myrs_destroy_mempools(struct myrs_hba *cs)
{}

static void myrs_unmap(struct myrs_hba *cs)
{}

static void myrs_cleanup(struct myrs_hba *cs)
{}

static struct myrs_hba *myrs_detect(struct pci_dev *pdev,
		const struct pci_device_id *entry)
{}

/*
 * myrs_err_status reports Controller BIOS Messages passed through
 * the Error Status Register when the driver performs the BIOS handshaking.
 * It returns true for fatal errors and false otherwise.
 */

static bool myrs_err_status(struct myrs_hba *cs, unsigned char status,
		unsigned char parm0, unsigned char parm1)
{}

/*
 * Hardware-specific functions
 */

/*
 * DAC960 GEM Series Controllers.
 */

static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base)
{}

static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base)
{}

static inline void DAC960_GEM_reset_ctrl(void __iomem *base)
{}

static inline void DAC960_GEM_mem_mbox_new_cmd(void __iomem *base)
{}

static inline bool DAC960_GEM_hw_mbox_is_full(void __iomem *base)
{}

static inline bool DAC960_GEM_init_in_progress(void __iomem *base)
{}

static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base)
{}

static inline void DAC960_GEM_ack_intr(void __iomem *base)
{}

static inline bool DAC960_GEM_hw_mbox_status_available(void __iomem *base)
{}

static inline void DAC960_GEM_enable_intr(void __iomem *base)
{}

static inline void DAC960_GEM_disable_intr(void __iomem *base)
{}

static inline void DAC960_GEM_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox,
		union myrs_cmd_mbox *mbox)
{}

static inline void DAC960_GEM_write_hw_mbox(void __iomem *base,
		dma_addr_t cmd_mbox_addr)
{}

static inline unsigned char DAC960_GEM_read_cmd_status(void __iomem *base)
{}

static inline bool
DAC960_GEM_read_error_status(void __iomem *base, unsigned char *error,
		unsigned char *param0, unsigned char *param1)
{}

static inline unsigned char
DAC960_GEM_mbox_init(void __iomem *base, dma_addr_t mbox_addr)
{}

static int DAC960_GEM_hw_init(struct pci_dev *pdev,
		struct myrs_hba *cs, void __iomem *base)
{}

static irqreturn_t DAC960_GEM_intr_handler(int irq, void *arg)
{}

static struct myrs_privdata DAC960_GEM_privdata =;

/*
 * DAC960 BA Series Controllers.
 */

static inline void DAC960_BA_hw_mbox_new_cmd(void __iomem *base)
{}

static inline void DAC960_BA_ack_hw_mbox_status(void __iomem *base)
{}

static inline void DAC960_BA_reset_ctrl(void __iomem *base)
{}

static inline void DAC960_BA_mem_mbox_new_cmd(void __iomem *base)
{}

static inline bool DAC960_BA_hw_mbox_is_full(void __iomem *base)
{}

static inline bool DAC960_BA_init_in_progress(void __iomem *base)
{}

static inline void DAC960_BA_ack_hw_mbox_intr(void __iomem *base)
{}

static inline void DAC960_BA_ack_intr(void __iomem *base)
{}

static inline bool DAC960_BA_hw_mbox_status_available(void __iomem *base)
{}

static inline void DAC960_BA_enable_intr(void __iomem *base)
{}

static inline void DAC960_BA_disable_intr(void __iomem *base)
{}

static inline void DAC960_BA_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox,
		union myrs_cmd_mbox *mbox)
{}


static inline void DAC960_BA_write_hw_mbox(void __iomem *base,
		dma_addr_t cmd_mbox_addr)
{}

static inline unsigned char DAC960_BA_read_cmd_status(void __iomem *base)
{}

static inline bool
DAC960_BA_read_error_status(void __iomem *base, unsigned char *error,
		unsigned char *param0, unsigned char *param1)
{}

static inline unsigned char
DAC960_BA_mbox_init(void __iomem *base, dma_addr_t mbox_addr)
{}

static int DAC960_BA_hw_init(struct pci_dev *pdev,
		struct myrs_hba *cs, void __iomem *base)
{}

static irqreturn_t DAC960_BA_intr_handler(int irq, void *arg)
{}

static struct myrs_privdata DAC960_BA_privdata =;

/*
 * DAC960 LP Series Controllers.
 */

static inline void DAC960_LP_hw_mbox_new_cmd(void __iomem *base)
{}

static inline void DAC960_LP_ack_hw_mbox_status(void __iomem *base)
{}

static inline void DAC960_LP_reset_ctrl(void __iomem *base)
{}

static inline void DAC960_LP_mem_mbox_new_cmd(void __iomem *base)
{}

static inline bool DAC960_LP_hw_mbox_is_full(void __iomem *base)
{}

static inline bool DAC960_LP_init_in_progress(void __iomem *base)
{}

static inline void DAC960_LP_ack_hw_mbox_intr(void __iomem *base)
{}

static inline void DAC960_LP_ack_intr(void __iomem *base)
{}

static inline bool DAC960_LP_hw_mbox_status_available(void __iomem *base)
{}

static inline void DAC960_LP_enable_intr(void __iomem *base)
{}

static inline void DAC960_LP_disable_intr(void __iomem *base)
{}

static inline void DAC960_LP_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox,
		union myrs_cmd_mbox *mbox)
{}

static inline void DAC960_LP_write_hw_mbox(void __iomem *base,
		dma_addr_t cmd_mbox_addr)
{}

static inline unsigned char DAC960_LP_read_cmd_status(void __iomem *base)
{}

static inline bool
DAC960_LP_read_error_status(void __iomem *base, unsigned char *error,
		unsigned char *param0, unsigned char *param1)
{}

static inline unsigned char
DAC960_LP_mbox_init(void __iomem *base, dma_addr_t mbox_addr)
{}

static int DAC960_LP_hw_init(struct pci_dev *pdev,
		struct myrs_hba *cs, void __iomem *base)
{}

static irqreturn_t DAC960_LP_intr_handler(int irq, void *arg)
{}

static struct myrs_privdata DAC960_LP_privdata =;

/*
 * Module functions
 */
static int
myrs_probe(struct pci_dev *dev, const struct pci_device_id *entry)
{}


static void myrs_remove(struct pci_dev *pdev)
{}


static const struct pci_device_id myrs_id_table[] =;

MODULE_DEVICE_TABLE(pci, myrs_id_table);

static struct pci_driver myrs_pci_driver =;

static int __init myrs_init_module(void)
{}

static void __exit myrs_cleanup_module(void)
{}

module_init();
module_exit(myrs_cleanup_module);

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();