linux/include/linux/mfd/tps65218.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * linux/mfd/tps65218.h
 *
 * Functions to access TPS65218 power management chip.
 *
 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
 */

#ifndef __LINUX_MFD_TPS65218_H
#define __LINUX_MFD_TPS65218_H

#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/bitops.h>

/* TPS chip id list */
#define TPS65218

/* I2C ID for TPS65218 part */
#define TPS65218_I2C_ID

/* All register addresses */
#define TPS65218_REG_CHIPID
#define TPS65218_REG_INT1
#define TPS65218_REG_INT2
#define TPS65218_REG_INT_MASK1
#define TPS65218_REG_INT_MASK2
#define TPS65218_REG_STATUS
#define TPS65218_REG_CONTROL
#define TPS65218_REG_FLAG

#define TPS65218_REG_PASSWORD
#define TPS65218_REG_ENABLE1
#define TPS65218_REG_ENABLE2
#define TPS65218_REG_CONFIG1
#define TPS65218_REG_CONFIG2
#define TPS65218_REG_CONFIG3
#define TPS65218_REG_CONTROL_DCDC1
#define TPS65218_REG_CONTROL_DCDC2
#define TPS65218_REG_CONTROL_DCDC3
#define TPS65218_REG_CONTROL_DCDC4
#define TPS65218_REG_CONTRL_SLEW_RATE
#define TPS65218_REG_CONTROL_LDO1
#define TPS65218_REG_SEQ1
#define TPS65218_REG_SEQ2
#define TPS65218_REG_SEQ3
#define TPS65218_REG_SEQ4
#define TPS65218_REG_SEQ5
#define TPS65218_REG_SEQ6
#define TPS65218_REG_SEQ7

/* Register field definitions */
#define TPS65218_CHIPID_CHIP_MASK
#define TPS65218_CHIPID_REV_MASK

#define TPS65218_REV_1_0
#define TPS65218_REV_1_1
#define TPS65218_REV_2_0
#define TPS65218_REV_2_1

#define TPS65218_INT1_VPRG
#define TPS65218_INT1_AC
#define TPS65218_INT1_PB
#define TPS65218_INT1_HOT
#define TPS65218_INT1_CC_AQC
#define TPS65218_INT1_PRGC

#define TPS65218_INT2_LS3_F
#define TPS65218_INT2_LS2_F
#define TPS65218_INT2_LS1_F
#define TPS65218_INT2_LS3_I
#define TPS65218_INT2_LS2_I
#define TPS65218_INT2_LS1_I

#define TPS65218_INT_MASK1_VPRG
#define TPS65218_INT_MASK1_AC
#define TPS65218_INT_MASK1_PB
#define TPS65218_INT_MASK1_HOT
#define TPS65218_INT_MASK1_CC_AQC
#define TPS65218_INT_MASK1_PRGC

#define TPS65218_INT_MASK2_LS3_F
#define TPS65218_INT_MASK2_LS2_F
#define TPS65218_INT_MASK2_LS1_F
#define TPS65218_INT_MASK2_LS3_I
#define TPS65218_INT_MASK2_LS2_I
#define TPS65218_INT_MASK2_LS1_I

#define TPS65218_STATUS_FSEAL
#define TPS65218_STATUS_EE
#define TPS65218_STATUS_AC_STATE
#define TPS65218_STATUS_PB_STATE
#define TPS65218_STATUS_STATE_MASK
#define TPS65218_STATUS_CC_STAT

#define TPS65218_CONTROL_OFFNPFO
#define TPS65218_CONTROL_CC_AQ

#define TPS65218_FLAG_GPO3_FLG
#define TPS65218_FLAG_GPO2_FLG
#define TPS65218_FLAG_GPO1_FLG
#define TPS65218_FLAG_LDO1_FLG
#define TPS65218_FLAG_DC4_FLG
#define TPS65218_FLAG_DC3_FLG
#define TPS65218_FLAG_DC2_FLG
#define TPS65218_FLAG_DC1_FLG

#define TPS65218_ENABLE1_DC6_EN
#define TPS65218_ENABLE1_DC5_EN
#define TPS65218_ENABLE1_DC4_EN
#define TPS65218_ENABLE1_DC3_EN
#define TPS65218_ENABLE1_DC2_EN
#define TPS65218_ENABLE1_DC1_EN

#define TPS65218_ENABLE2_GPIO3
#define TPS65218_ENABLE2_GPIO2
#define TPS65218_ENABLE2_GPIO1
#define TPS65218_ENABLE2_LS3_EN
#define TPS65218_ENABLE2_LS2_EN
#define TPS65218_ENABLE2_LS1_EN
#define TPS65218_ENABLE2_LDO1_EN


#define TPS65218_CONFIG1_TRST
#define TPS65218_CONFIG1_GPO2_BUF
#define TPS65218_CONFIG1_IO1_SEL
#define TPS65218_CONFIG1_PGDLY_MASK
#define TPS65218_CONFIG1_STRICT
#define TPS65218_CONFIG1_UVLO_MASK
#define TPS65218_CONFIG1_UVLO_2750000
#define TPS65218_CONFIG1_UVLO_2950000
#define TPS65218_CONFIG1_UVLO_3250000
#define TPS65218_CONFIG1_UVLO_3350000

#define TPS65218_CONFIG2_DC12_RST
#define TPS65218_CONFIG2_UVLOHYS
#define TPS65218_CONFIG2_LS3ILIM_MASK
#define TPS65218_CONFIG2_LS2ILIM_MASK

#define TPS65218_CONFIG3_LS3NPFO
#define TPS65218_CONFIG3_LS2NPFO
#define TPS65218_CONFIG3_LS1NPFO
#define TPS65218_CONFIG3_LS3DCHRG
#define TPS65218_CONFIG3_LS2DCHRG
#define TPS65218_CONFIG3_LS1DCHRG

#define TPS65218_CONTROL_DCDC1_PFM
#define TPS65218_CONTROL_DCDC1_MASK

#define TPS65218_CONTROL_DCDC2_PFM
#define TPS65218_CONTROL_DCDC2_MASK

#define TPS65218_CONTROL_DCDC3_PFM
#define TPS65218_CONTROL_DCDC3_MASK

#define TPS65218_CONTROL_DCDC4_PFM
#define TPS65218_CONTROL_DCDC4_MASK

#define TPS65218_SLEW_RATE_GO
#define TPS65218_SLEW_RATE_GODSBL
#define TPS65218_SLEW_RATE_SLEW_MASK

#define TPS65218_CONTROL_LDO1_MASK

#define TPS65218_SEQ1_DLY8
#define TPS65218_SEQ1_DLY7
#define TPS65218_SEQ1_DLY6
#define TPS65218_SEQ1_DLY5
#define TPS65218_SEQ1_DLY4
#define TPS65218_SEQ1_DLY3
#define TPS65218_SEQ1_DLY2
#define TPS65218_SEQ1_DLY1

#define TPS65218_SEQ2_DLYFCTR
#define TPS65218_SEQ2_DLY9

#define TPS65218_SEQ3_DC2_SEQ_MASK
#define TPS65218_SEQ3_DC1_SEQ_MASK

#define TPS65218_SEQ4_DC4_SEQ_MASK
#define TPS65218_SEQ4_DC3_SEQ_MASK

#define TPS65218_SEQ5_DC6_SEQ_MASK
#define TPS65218_SEQ5_DC5_SEQ_MASK

#define TPS65218_SEQ6_LS1_SEQ_MASK
#define TPS65218_SEQ6_LDO1_SEQ_MASK

#define TPS65218_SEQ7_GPO3_SEQ_MASK
#define TPS65218_SEQ7_GPO1_SEQ_MASK
#define TPS65218_PROTECT_NONE
#define TPS65218_PROTECT_L1

enum tps65218_regulator_id {};

#define TPS65218_MAX_REG_ID

/* Number of step-down converters available */
#define TPS65218_NUM_DCDC
/* Number of LDO voltage regulators available */
#define TPS65218_NUM_LDO
/* Number of total LS current regulators available */
#define TPS65218_NUM_LS
/* Number of total regulators available */
#define TPS65218_NUM_REGULATOR

/* Define the TPS65218 IRQ numbers */
enum tps65218_irqs {};

/**
 * struct tps65218 - tps65218 sub-driver chip access routines
 *
 * Device data may be used to access the TPS65218 chip
 */

struct tps65218 {};

int tps65218_reg_write(struct tps65218 *tps, unsigned int reg,
			unsigned int val, unsigned int level);
int tps65218_set_bits(struct tps65218 *tps, unsigned int reg,
		unsigned int mask, unsigned int val, unsigned int level);
int tps65218_clear_bits(struct tps65218 *tps, unsigned int reg,
		unsigned int mask, unsigned int level);

#endif /*  __LINUX_MFD_TPS65218_H */