/* SPDX-License-Identifier: GPL-2.0 */ /* * Functions to access TPS65219 Power Management IC. * * Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ */ #ifndef MFD_TPS65219_H #define MFD_TPS65219_H #include <linux/bitops.h> #include <linux/notifier.h> #include <linux/regulator/driver.h> struct regmap; struct regmap_irq_chip_data; #define TPS65219_1V35 … #define TPS65219_1V8 … /* TPS chip id list */ #define TPS65219 … /* I2C ID for TPS65219 part */ #define TPS65219_I2C_ID … /* All register addresses */ #define TPS65219_REG_TI_DEV_ID … #define TPS65219_REG_NVM_ID … #define TPS65219_REG_ENABLE_CTRL … #define TPS65219_REG_BUCKS_CONFIG … #define TPS65219_REG_LDO4_VOUT … #define TPS65219_REG_LDO3_VOUT … #define TPS65219_REG_LDO2_VOUT … #define TPS65219_REG_LDO1_VOUT … #define TPS65219_REG_BUCK3_VOUT … #define TPS65219_REG_BUCK2_VOUT … #define TPS65219_REG_BUCK1_VOUT … #define TPS65219_REG_LDO4_SEQUENCE_SLOT … #define TPS65219_REG_LDO3_SEQUENCE_SLOT … #define TPS65219_REG_LDO2_SEQUENCE_SLOT … #define TPS65219_REG_LDO1_SEQUENCE_SLOT … #define TPS65219_REG_BUCK3_SEQUENCE_SLOT … #define TPS65219_REG_BUCK2_SEQUENCE_SLOT … #define TPS65219_REG_BUCK1_SEQUENCE_SLOT … #define TPS65219_REG_nRST_SEQUENCE_SLOT … #define TPS65219_REG_GPIO_SEQUENCE_SLOT … #define TPS65219_REG_GPO2_SEQUENCE_SLOT … #define TPS65219_REG_GPO1_SEQUENCE_SLOT … #define TPS65219_REG_POWER_UP_SLOT_DURATION_1 … #define TPS65219_REG_POWER_UP_SLOT_DURATION_2 … #define TPS65219_REG_POWER_UP_SLOT_DURATION_3 … #define TPS65219_REG_POWER_UP_SLOT_DURATION_4 … #define TPS65219_REG_POWER_DOWN_SLOT_DURATION_1 … #define TPS65219_REG_POWER_DOWN_SLOT_DURATION_2 … #define TPS65219_REG_POWER_DOWN_SLOT_DURATION_3 … #define TPS65219_REG_POWER_DOWN_SLOT_DURATION_4 … #define TPS65219_REG_GENERAL_CONFIG … #define TPS65219_REG_MFP_1_CONFIG … #define TPS65219_REG_MFP_2_CONFIG … #define TPS65219_REG_STBY_1_CONFIG … #define TPS65219_REG_STBY_2_CONFIG … #define TPS65219_REG_OC_DEGL_CONFIG … /* 'sub irq' MASK registers */ #define TPS65219_REG_INT_MASK_UV … #define TPS65219_REG_MASK_CONFIG … #define TPS65219_REG_I2C_ADDRESS_REG … #define TPS65219_REG_USER_GENERAL_NVM_STORAGE … #define TPS65219_REG_MANUFACTURING_VER … #define TPS65219_REG_MFP_CTRL … #define TPS65219_REG_DISCHARGE_CONFIG … /* main irq registers */ #define TPS65219_REG_INT_SOURCE … /* 'sub irq' registers */ #define TPS65219_REG_INT_LDO_3_4 … #define TPS65219_REG_INT_LDO_1_2 … #define TPS65219_REG_INT_BUCK_3 … #define TPS65219_REG_INT_BUCK_1_2 … #define TPS65219_REG_INT_SYSTEM … #define TPS65219_REG_INT_RV … #define TPS65219_REG_INT_TIMEOUT_RV_SD … #define TPS65219_REG_INT_PB … #define TPS65219_REG_INT_LDO_3_4_POS … #define TPS65219_REG_INT_LDO_1_2_POS … #define TPS65219_REG_INT_BUCK_3_POS … #define TPS65219_REG_INT_BUCK_1_2_POS … #define TPS65219_REG_INT_SYS_POS … #define TPS65219_REG_INT_RV_POS … #define TPS65219_REG_INT_TO_RV_POS … #define TPS65219_REG_INT_PB_POS … #define TPS65219_REG_USER_NVM_CMD … #define TPS65219_REG_POWER_UP_STATUS … #define TPS65219_REG_SPARE_2 … #define TPS65219_REG_SPARE_3 … #define TPS65219_REG_FACTORY_CONFIG_2 … /* Register field definitions */ #define TPS65219_DEVID_REV_MASK … #define TPS65219_BUCKS_LDOS_VOUT_VSET_MASK … #define TPS65219_BUCKS_UV_THR_SEL_MASK … #define TPS65219_BUCKS_BW_SEL_MASK … #define LDO_BYP_SHIFT … #define TPS65219_LDOS_BYP_CONFIG_MASK … #define TPS65219_LDOS_LSW_CONFIG_MASK … /* Regulators enable control */ #define TPS65219_ENABLE_BUCK1_EN_MASK … #define TPS65219_ENABLE_BUCK2_EN_MASK … #define TPS65219_ENABLE_BUCK3_EN_MASK … #define TPS65219_ENABLE_LDO1_EN_MASK … #define TPS65219_ENABLE_LDO2_EN_MASK … #define TPS65219_ENABLE_LDO3_EN_MASK … #define TPS65219_ENABLE_LDO4_EN_MASK … /* power ON-OFF sequence slot */ #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK … #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK … /* TODO: Not needed, same mapping as TPS65219_ENABLE_REGNAME_EN, factorize */ #define TPS65219_STBY1_BUCK1_STBY_EN_MASK … #define TPS65219_STBY1_BUCK2_STBY_EN_MASK … #define TPS65219_STBY1_BUCK3_STBY_EN_MASK … #define TPS65219_STBY1_LDO1_STBY_EN_MASK … #define TPS65219_STBY1_LDO2_STBY_EN_MASK … #define TPS65219_STBY1_LDO3_STBY_EN_MASK … #define TPS65219_STBY1_LDO4_STBY_EN_MASK … /* STBY_2 config */ #define TPS65219_STBY2_GPO1_STBY_EN_MASK … #define TPS65219_STBY2_GPO2_STBY_EN_MASK … #define TPS65219_STBY2_GPIO_STBY_EN_MASK … /* MFP Control */ #define TPS65219_MFP_I2C_OFF_REQ_MASK … #define TPS65219_MFP_STBY_I2C_CTRL_MASK … #define TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK … #define TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK … #define TPS65219_MFP_GPIO_STATUS_MASK … /* MFP_1 Config */ #define TPS65219_MFP_1_VSEL_DDR_SEL_MASK … #define TPS65219_MFP_1_VSEL_SD_POL_MASK … #define TPS65219_MFP_1_VSEL_RAIL_MASK … /* MFP_2 Config */ #define TPS65219_MFP_2_MODE_STBY_MASK … #define TPS65219_MFP_2_MODE_RESET_MASK … #define TPS65219_MFP_2_EN_PB_VSENSE_DEGL_MASK … #define TPS65219_MFP_2_EN_PB_VSENSE_MASK … #define TPS65219_MFP_2_WARM_COLD_RESET_MASK … #define TPS65219_MFP_2_PU_ON_FSD_MASK … #define TPS65219_MFP_2_EN … #define TPS65219_MFP_2_PB … #define TPS65219_MFP_2_VSENSE … /* MASK_UV Config */ #define TPS65219_REG_MASK_UV_LDO1_UV_MASK … #define TPS65219_REG_MASK_UV_LDO2_UV_MASK … #define TPS65219_REG_MASK_UV_LDO3_UV_MASK … #define TPS65219_REG_MASK_UV_LDO4_UV_MASK … #define TPS65219_REG_MASK_UV_BUCK1_UV_MASK … #define TPS65219_REG_MASK_UV_BUCK2_UV_MASK … #define TPS65219_REG_MASK_UV_BUCK3_UV_MASK … #define TPS65219_REG_MASK_UV_RETRY_MASK … /* MASK Config */ // SENSOR_N_WARM_MASK already defined in Thermal #define TPS65219_REG_MASK_INT_FOR_RV_MASK … #define TPS65219_REG_MASK_EFFECT_MASK … #define TPS65219_REG_MASK_INT_FOR_PB_MASK … /* UnderVoltage - Short to GND - OverCurrent*/ /* LDO3-4 */ #define TPS65219_INT_LDO3_SCG_MASK … #define TPS65219_INT_LDO3_OC_MASK … #define TPS65219_INT_LDO3_UV_MASK … #define TPS65219_INT_LDO4_SCG_MASK … #define TPS65219_INT_LDO4_OC_MASK … #define TPS65219_INT_LDO4_UV_MASK … /* LDO1-2 */ #define TPS65219_INT_LDO1_SCG_MASK … #define TPS65219_INT_LDO1_OC_MASK … #define TPS65219_INT_LDO1_UV_MASK … #define TPS65219_INT_LDO2_SCG_MASK … #define TPS65219_INT_LDO2_OC_MASK … #define TPS65219_INT_LDO2_UV_MASK … /* BUCK3 */ #define TPS65219_INT_BUCK3_SCG_MASK … #define TPS65219_INT_BUCK3_OC_MASK … #define TPS65219_INT_BUCK3_NEG_OC_MASK … #define TPS65219_INT_BUCK3_UV_MASK … /* BUCK1-2 */ #define TPS65219_INT_BUCK1_SCG_MASK … #define TPS65219_INT_BUCK1_OC_MASK … #define TPS65219_INT_BUCK1_NEG_OC_MASK … #define TPS65219_INT_BUCK1_UV_MASK … #define TPS65219_INT_BUCK2_SCG_MASK … #define TPS65219_INT_BUCK2_OC_MASK … #define TPS65219_INT_BUCK2_NEG_OC_MASK … #define TPS65219_INT_BUCK2_UV_MASK … /* Thermal Sensor */ #define TPS65219_INT_SENSOR_3_WARM_MASK … #define TPS65219_INT_SENSOR_2_WARM_MASK … #define TPS65219_INT_SENSOR_1_WARM_MASK … #define TPS65219_INT_SENSOR_0_WARM_MASK … #define TPS65219_INT_SENSOR_3_HOT_MASK … #define TPS65219_INT_SENSOR_2_HOT_MASK … #define TPS65219_INT_SENSOR_1_HOT_MASK … #define TPS65219_INT_SENSOR_0_HOT_MASK … /* Residual Voltage */ #define TPS65219_INT_BUCK1_RV_MASK … #define TPS65219_INT_BUCK2_RV_MASK … #define TPS65219_INT_BUCK3_RV_MASK … #define TPS65219_INT_LDO1_RV_MASK … #define TPS65219_INT_LDO2_RV_MASK … #define TPS65219_INT_LDO3_RV_MASK … #define TPS65219_INT_LDO4_RV_MASK … /* Residual Voltage ShutDown */ #define TPS65219_INT_BUCK1_RV_SD_MASK … #define TPS65219_INT_BUCK2_RV_SD_MASK … #define TPS65219_INT_BUCK3_RV_SD_MASK … #define TPS65219_INT_LDO1_RV_SD_MASK … #define TPS65219_INT_LDO2_RV_SD_MASK … #define TPS65219_INT_LDO3_RV_SD_MASK … #define TPS65219_INT_LDO4_RV_SD_MASK … #define TPS65219_INT_TIMEOUT_MASK … /* Power Button */ #define TPS65219_INT_PB_FALLING_EDGE_DETECT_MASK … #define TPS65219_INT_PB_RISING_EDGE_DETECT_MASK … #define TPS65219_INT_PB_REAL_TIME_STATUS_MASK … #define TPS65219_PB_POS … #define TPS65219_TO_RV_POS … #define TPS65219_RV_POS … #define TPS65219_SYS_POS … #define TPS65219_BUCK_1_2_POS … #define TPS65219_BUCK_3_POS … #define TPS65219_LDO_1_2_POS … #define TPS65219_LDO_3_4_POS … /* IRQs */ enum { … }; enum tps65219_regulator_id { … }; /* Number of step-down converters available */ #define TPS65219_NUM_DCDC … /* Number of LDO voltage regulators available */ #define TPS65219_NUM_LDO … /* Number of total regulators available */ #define TPS65219_NUM_REGULATOR … /* Define the TPS65219 IRQ numbers */ enum tps65219_irqs { … }; /** * struct tps65219 - tps65219 sub-driver chip access routines * * Device data may be used to access the TPS65219 chip * * @dev: MFD device * @regmap: Regmap for accessing the device registers * @irq_data: Regmap irq data used for the irq chip * @nb: notifier block for the restart handler */ struct tps65219 { … }; #endif /* MFD_TPS65219_H */
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