// SPDX-License-Identifier: GPL-2.0-or-later /* * Broadcom SATA3 AHCI Controller Driver * * Copyright © 2009-2015 Broadcom Corporation */ #include <linux/ahci_platform.h> #include <linux/compiler.h> #include <linux/device.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/libata.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <linux/string.h> #include "ahci.h" #define DRV_NAME … #define SATA_TOP_CTRL_VERSION … #define SATA_TOP_CTRL_BUS_CTRL … #define MMIO_ENDIAN_SHIFT … #define DMADESC_ENDIAN_SHIFT … #define DMADATA_ENDIAN_SHIFT … #define PIODATA_ENDIAN_SHIFT … #define ENDIAN_SWAP_NONE … #define ENDIAN_SWAP_FULL … #define SATA_TOP_CTRL_TP_CTRL … #define SATA_TOP_CTRL_PHY_CTRL … #define SATA_TOP_CTRL_PHY_CTRL_1 … #define SATA_TOP_CTRL_1_PHY_DEFAULT_POWER_STATE … #define SATA_TOP_CTRL_PHY_CTRL_2 … #define SATA_TOP_CTRL_2_SW_RST_MDIOREG … #define SATA_TOP_CTRL_2_SW_RST_OOB … #define SATA_TOP_CTRL_2_SW_RST_RX … #define SATA_TOP_CTRL_2_SW_RST_TX … #define SATA_TOP_CTRL_2_PHY_GLOBAL_RESET … #define SATA_TOP_CTRL_PHY_OFFS … #define SATA_TOP_MAX_PHYS … #define SATA_FIRST_PORT_CTRL … #define SATA_NEXT_PORT_CTRL_OFFSET … #define SATA_PORT_PCTRL6(reg_base) … /* On big-endian MIPS, buses are reversed to big endian, so switch them back */ #if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN) #define DATA_ENDIAN … #define MMIO_ENDIAN … #else #define DATA_ENDIAN … #define MMIO_ENDIAN … #endif #define BUS_CTRL_ENDIAN_CONF … #define BUS_CTRL_ENDIAN_NSP_CONF … #define BUS_CTRL_ENDIAN_CONF_MASK … enum brcm_ahci_version { … }; enum brcm_ahci_quirks { … }; struct brcm_ahci_priv { … }; static inline u32 brcm_sata_readreg(void __iomem *addr) { … } static inline void brcm_sata_writereg(u32 val, void __iomem *addr) { … } static void brcm_sata_alpm_init(struct ahci_host_priv *hpriv) { … } static void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port) { … } static void brcm_sata_phy_disable(struct brcm_ahci_priv *priv, int port) { … } static void brcm_sata_phys_enable(struct brcm_ahci_priv *priv) { … } static void brcm_sata_phys_disable(struct brcm_ahci_priv *priv) { … } static u32 brcm_ahci_get_portmask(struct ahci_host_priv *hpriv, struct brcm_ahci_priv *priv) { … } static void brcm_sata_init(struct brcm_ahci_priv *priv) { … } static unsigned int brcm_ahci_read_id(struct ata_device *dev, struct ata_taskfile *tf, __le16 *id) { … } static void brcm_ahci_host_stop(struct ata_host *host) { … } static struct ata_port_operations ahci_brcm_platform_ops = …; static const struct ata_port_info ahci_brcm_port_info = …; static int brcm_ahci_suspend(struct device *dev) { … } static int __maybe_unused brcm_ahci_resume(struct device *dev) { … } static const struct scsi_host_template ahci_platform_sht = …; static const struct of_device_id ahci_of_match[] = …; MODULE_DEVICE_TABLE(of, ahci_of_match); static int brcm_ahci_probe(struct platform_device *pdev) { … } static void brcm_ahci_remove(struct platform_device *pdev) { … } static void brcm_ahci_shutdown(struct platform_device *pdev) { … } static SIMPLE_DEV_PM_OPS(ahci_brcm_pm_ops, brcm_ahci_suspend, brcm_ahci_resume); static struct platform_driver brcm_ahci_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …;
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