// SPDX-License-Identifier: GPL-2.0-or-later /* * ata_piix.c - Intel PATA/SATA controllers * * Maintained by: Tejun Heo <[email protected]> * Please ALWAYS copy [email protected] * on emails. * * Copyright 2003-2005 Red Hat Inc * Copyright 2003-2005 Jeff Garzik * * Copyright header from piix.c: * * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer * Copyright (C) 1998-2000 Andre Hedrick <[email protected]> * Copyright (C) 2003 Red Hat Inc * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/driver-api/libata.rst * * Hardware documentation available at http://developer.intel.com/ * * Documentation * Publicly available from Intel web site. Errata documentation * is also publicly available. As an aide to anyone hacking on this * driver the list of errata that are relevant is below, going back to * PIIX4. Older device documentation is now a bit tricky to find. * * The chipsets all follow very much the same design. The original Triton * series chipsets do _not_ support independent device timings, but this * is fixed in Triton II. With the odd mobile exception the chips then * change little except in gaining more modes until SATA arrives. This * driver supports only the chips with independent timing (that is those * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix * for the early chip drivers. * * Errata of note: * * Unfixable * PIIX4 errata #9 - Only on ultra obscure hw * ICH3 errata #13 - Not observed to affect real hw * by Intel * * Things we must deal with * PIIX4 errata #10 - BM IDE hang with non UDMA * (must stop/start dma to recover) * 440MX errata #15 - As PIIX4 errata #10 * PIIX4 errata #15 - Must not read control registers * during a PIO transfer * 440MX errata #13 - As PIIX4 errata #15 * ICH2 errata #21 - DMA mode 0 doesn't work right * ICH0/1 errata #55 - As ICH2 errata #21 * ICH2 spec c #9 - Extra operations needed to handle * drive hotswap [NOT YET SUPPORTED] * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary * and must be dword aligned * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 * ICH7 errata #16 - MWDMA1 timings are incorrect * * Should have been BIOS fixed: * 450NX: errata #19 - DMA hangs on old 450NX * 450NX: errata #20 - DMA hangs on old 450NX * 450NX: errata #25 - Corruption with DMA on old 450NX * ICH3 errata #15 - IDE deadlock under high load * (BIOS must set dev 31 fn 0 bit 23) * ICH3 errata #18 - Don't use native mode */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/init.h> #include <linux/blkdev.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/gfp.h> #include <scsi/scsi_host.h> #include <linux/libata.h> #include <linux/dmi.h> #include <trace/events/libata.h> #define DRV_NAME … #define DRV_VERSION … enum { … }; enum piix_controller_ids { … }; struct piix_map_db { … }; struct piix_host_priv { … }; static unsigned int in_module_init = …; static const struct pci_device_id piix_pci_tbl[] = …; static const struct piix_map_db ich5_map_db = …; static const struct piix_map_db ich6_map_db = …; static const struct piix_map_db ich6m_map_db = …; static const struct piix_map_db ich8_map_db = …; static const struct piix_map_db ich8_2port_map_db = …; static const struct piix_map_db ich8m_apple_map_db = …; static const struct piix_map_db tolapai_map_db = …; static const struct piix_map_db *piix_map_db_table[] = …; static const struct pci_bits piix_enable_bits[] = …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_DEVICE_TABLE(pci, piix_pci_tbl); MODULE_VERSION(…); struct ich_laptop { … }; /* * List of laptops that use short cables rather than 80 wire */ static const struct ich_laptop ich_laptop[] = …; static int piix_port_start(struct ata_port *ap) { … } /** * ich_pata_cable_detect - Probe host controller cable detect info * @ap: Port for which cable detect info is desired * * Read 80c cable indicator from ATA PCI device's PCI config * register. This register is normally set by firmware (BIOS). * * LOCKING: * None (inherited from caller). */ static int ich_pata_cable_detect(struct ata_port *ap) { … } /** * piix_pata_prereset - prereset for PATA host controller * @link: Target link * @deadline: deadline jiffies for the operation * * LOCKING: * None (inherited from caller). */ static int piix_pata_prereset(struct ata_link *link, unsigned long deadline) { … } static DEFINE_SPINLOCK(piix_lock); static void piix_set_timings(struct ata_port *ap, struct ata_device *adev, u8 pio) { … } /** * piix_set_piomode - Initialize host controller PATA PIO timings * @ap: Port whose timings we are configuring * @adev: Drive in question * * Set PIO mode for device, in host controller PCI config space. * * LOCKING: * None (inherited from caller). */ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } /** * do_pata_set_dmamode - Initialize host controller PATA PIO timings * @ap: Port whose timings we are configuring * @adev: Drive in question * @isich: set if the chip is an ICH device * * Set UDMA mode for device, in host controller PCI config space. * * LOCKING: * None (inherited from caller). */ static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, int isich) { … } /** * piix_set_dmamode - Initialize host controller PATA DMA timings * @ap: Port whose timings we are configuring * @adev: um * * Set MW/UDMA mode for device, in host controller PCI config space. * * LOCKING: * None (inherited from caller). */ static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev) { … } /** * ich_set_dmamode - Initialize host controller PATA DMA timings * @ap: Port whose timings we are configuring * @adev: um * * Set MW/UDMA mode for device, in host controller PCI config space. * * LOCKING: * None (inherited from caller). */ static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev) { … } /* * Serial ATA Index/Data Pair Superset Registers access * * Beginning from ICH8, there's a sane way to access SCRs using index * and data register pair located at BAR5 which means that we have * separate SCRs for master and slave. This is handled using libata * slave_link facility. */ static const int piix_sidx_map[] = …; static void piix_sidpr_sel(struct ata_link *link, unsigned int reg) { … } static int piix_sidpr_scr_read(struct ata_link *link, unsigned int reg, u32 *val) { … } static int piix_sidpr_scr_write(struct ata_link *link, unsigned int reg, u32 val) { … } static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, unsigned hints) { … } static bool piix_irq_check(struct ata_port *ap) { … } #ifdef CONFIG_PM_SLEEP static int piix_broken_suspend(void) { … } static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) { … } static int piix_pci_device_resume(struct pci_dev *pdev) { … } #endif static u8 piix_vmw_bmdma_status(struct ata_port *ap) { … } static const struct scsi_host_template piix_sht = …; static struct ata_port_operations piix_sata_ops = …; static struct ata_port_operations piix_pata_ops = …; static struct ata_port_operations piix_vmw_ops = …; static struct ata_port_operations ich_pata_ops = …; static struct attribute *piix_sidpr_shost_attrs[] = …; ATTRIBUTE_GROUPS(…); static const struct scsi_host_template piix_sidpr_sht = …; static struct ata_port_operations piix_sidpr_sata_ops = …; static struct ata_port_info piix_port_info[] = …; #define AHCI_PCI_BAR … #define AHCI_GLOBAL_CTL … #define AHCI_ENABLE … static int piix_disable_ahci(struct pci_dev *pdev) { … } /** * piix_check_450nx_errata - Check for problem 450NX setup * @ata_dev: the PCI device to check * * Check for the present of 450NX errata #19 and errata #25. If * they are found return an error code so we can turn off DMA */ static int piix_check_450nx_errata(struct pci_dev *ata_dev) { … } static void piix_init_pcs(struct ata_host *host, const struct piix_map_db *map_db) { … } static const int *piix_init_sata_map(struct pci_dev *pdev, struct ata_port_info *pinfo, const struct piix_map_db *map_db) { … } static bool piix_no_sidpr(struct ata_host *host) { … } static int piix_init_sidpr(struct ata_host *host) { … } static void piix_iocfg_bit18_quirk(struct ata_host *host) { … } static bool piix_broken_system_poweroff(struct pci_dev *pdev) { … } static int prefer_ms_hyperv = …; module_param(prefer_ms_hyperv, int, 0); MODULE_PARM_DESC(…) …; static void piix_ignore_devices_quirk(struct ata_host *host) { … } /** * piix_init_one - Register PIIX ATA PCI device with kernel services * @pdev: PCI device to register * @ent: Entry in piix_pci_tbl matching with @pdev * * Called from kernel PCI layer. We probe for combined mode (sigh), * and then hand over control to libata, for it to do the rest. * * LOCKING: * Inherited from PCI layer (may sleep). * * RETURNS: * Zero on success, or -ERRNO value. */ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { … } static void piix_remove_one(struct pci_dev *pdev) { … } static struct pci_driver piix_pci_driver = …; static int __init piix_init(void) { … } static void __exit piix_exit(void) { … } module_init(…) …; module_exit(piix_exit);
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