linux/drivers/ata/ata_generic.c

/*
 *  ata_generic.c - Generic PATA/SATA controller driver.
 *  Copyright 2005 Red Hat Inc, all rights reserved.
 *
 *  Elements from ide/pci/generic.c
 *	    Copyright (C) 2001-2002	Andre Hedrick <[email protected]>
 *	    Portions (C) Copyright 2002  Red Hat Inc <[email protected]>
 *
 *  May be copied or modified under the terms of the GNU General Public License
 *
 *  Driver for PCI IDE interfaces implementing the standard bus mastering
 *  interface functionality. This assumes the BIOS did the drive set up and
 *  tuning for us. By default we do not grab all IDE class devices as they
 *  may have other drivers or need fixups to avoid problems. Instead we keep
 *  a default list of stuff without documentation/driver that appears to
 *  work.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME
#define DRV_VERSION

/*
 *	A generic parallel ATA driver using libata
 */

enum {};

/**
 *	generic_set_mode	-	mode setting
 *	@link: link to set up
 *	@unused: returned device on error
 *
 *	Use a non standard set_mode function. We don't want to be tuned.
 *	The BIOS configured everything. Our job is not to fiddle. We
 *	read the dma enabled bits from the PCI configuration of the device
 *	and respect them.
 */

static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
{}

static const struct scsi_host_template generic_sht =;

static struct ata_port_operations generic_port_ops =;

static int all_generic_ide;		/* Set to claim all devices */

/**
 *	is_intel_ider		-	identify intel IDE-R devices
 *	@dev: PCI device
 *
 *	Distinguish Intel IDE-R controller devices from other Intel IDE
 *	devices. IDE-R devices have no timing registers and are in
 *	most respects virtual. They should be driven by the ata_generic
 *	driver.
 *
 *	IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
 *	it non zero. All Intel ATA has 0x40 writable (timing), but it is
 *	not writable on IDE-R devices (this is guaranteed).
 */

static int is_intel_ider(struct pci_dev *dev)
{}

/**
 *	ata_generic_init_one		-	attach generic IDE
 *	@dev: PCI device found
 *	@id: match entry
 *
 *	Called each time a matching IDE interface is found. We check if the
 *	interface is one we wish to claim and if so we perform any chip
 *	specific hacks then let the ATA layer do the heavy lifting.
 */

static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{}

static struct pci_device_id ata_generic[] =;

static struct pci_driver ata_generic_pci_driver =;

module_pci_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_DEVICE_TABLE(pci, ata_generic);
MODULE_VERSION();

module_param(all_generic_ide, int, 0);