// SPDX-License-Identifier: GPL-2.0-or-later /* * pata-legacy.c - Legacy port PATA/SATA controller driver. * Copyright 2005/2006 Red Hat, all rights reserved. * * An ATA driver for the legacy ATA ports. * * Data Sources: * Opti 82C465/82C611 support: Data sheets at opti-inc.com * HT6560 series: * Promise 20230/20620: * http://www.ryston.cz/petr/vlb/pdc20230b.html * http://www.ryston.cz/petr/vlb/pdc20230c.html * http://www.ryston.cz/petr/vlb/pdc20630.html * QDI65x0: * http://www.ryston.cz/petr/vlb/qd6500.html * http://www.ryston.cz/petr/vlb/qd6580.html * * QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c * Rewritten from the work of Colten Edwards <[email protected]> by * Samuel Thibault <[email protected]> * * Unsupported but docs exist: * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 * * This driver handles legacy (that is "ISA/VLB side") IDE ports found * on PC class systems. There are three hybrid devices that are exceptions * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and * the MPIIX where the tuning is PCI side but the IDE is "ISA side". * * Specific support is included for the ht6560a/ht6560b/opti82c611a/ * opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A * * Support for the Winbond 83759A when operating in advanced mode. * Multichip mode is not currently supported. * * Use the autospeed and pio_mask options with: * Appian ADI/2 aka CLPD7220 or AIC25VL01. * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759, * Winbond W83759A, Promise PDC20230-B * * For now use autospeed and pio_mask as above with the W83759A. This may * change. */ #include <linux/async.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/init.h> #include <linux/blkdev.h> #include <linux/delay.h> #include <scsi/scsi_host.h> #include <linux/ata.h> #include <linux/libata.h> #include <linux/platform_device.h> #define DRV_NAME … #define DRV_VERSION … #define NR_HOST … static int all; module_param(all, int, 0444); MODULE_PARM_DESC(…) …; static int probe_all; module_param(probe_all, int, 0); MODULE_PARM_DESC(…) …; static int probe_mask = …; module_param(probe_mask, int, 0); MODULE_PARM_DESC(…) …; static int autospeed; module_param(autospeed, int, 0); MODULE_PARM_DESC(…) …; static int pio_mask = …; module_param(pio_mask, int, 0); MODULE_PARM_DESC(…) …; static int iordy_mask = …; module_param(iordy_mask, int, 0); MODULE_PARM_DESC(…) …; static int ht6560a; module_param(ht6560a, int, 0); MODULE_PARM_DESC(…) …; static int ht6560b; module_param(ht6560b, int, 0); MODULE_PARM_DESC(…) …; static int opti82c611a; module_param(opti82c611a, int, 0); MODULE_PARM_DESC(…) …; static int opti82c46x; module_param(opti82c46x, int, 0); MODULE_PARM_DESC(…) …; #ifdef CONFIG_PATA_QDI_MODULE static int qdi = 1; #else static int qdi; #endif module_param(qdi, int, 0); MODULE_PARM_DESC(…) …; #ifdef CONFIG_PATA_WINBOND_VLB_MODULE static int winbond = 1; #else static int winbond; #endif module_param(winbond, int, 0); MODULE_PARM_DESC(…) …; enum controller { … }; struct legacy_data { … }; struct legacy_probe { … }; struct legacy_controller { … }; static int legacy_port[NR_HOST] = …; static struct legacy_probe probe_list[NR_HOST]; static struct legacy_data legacy_data[NR_HOST]; static struct ata_host *legacy_host[NR_HOST]; /** * legacy_probe_add - Add interface to probe list * @port: Controller port * @irq: IRQ number * @type: Controller type * @private: Controller specific info * * Add an entry into the probe list for ATA controllers. This is used * to add the default ISA slots and then to build up the table * further according to other ISA/VLB/Weird device scans * * An I/O port list is used to keep ordering stable and sane, as we * don't have any good way to talk about ordering otherwise */ static int legacy_probe_add(unsigned long port, unsigned int irq, enum controller type, unsigned long private) { … } /** * legacy_set_mode - mode setting * @link: IDE link * @unused: Device that failed when error is returned * * Use a non standard set_mode function. We don't want to be tuned. * * The BIOS configured everything. Our job is not to fiddle. Just use * whatever PIO the hardware is using and leave it at that. When we * get some kind of nice user driven API for control then we can * expand on this as per hdparm in the base kernel. */ static int legacy_set_mode(struct ata_link *link, struct ata_device **unused) { … } static const struct scsi_host_template legacy_sht = …; static const struct ata_port_operations legacy_base_port_ops = …; /* * These ops are used if the user indicates the hardware * snoops the commands to decide on the mode and handles the * mode selection "magically" itself. Several legacy controllers * do this. The mode range can be set if it is not 0x1F by setting * pio_mask as well. */ static struct ata_port_operations simple_port_ops = …; static struct ata_port_operations legacy_port_ops = …; /* * Promise 20230C and 20620 support * * This controller supports PIO0 to PIO2. We set PIO timings * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA * support is weird being DMA to controller and PIO'd to the host * and not supported. */ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } static unsigned int pdc_data_xfer_vlb(struct ata_queued_cmd *qc, unsigned char *buf, unsigned int buflen, int rw) { … } static struct ata_port_operations pdc20230_port_ops = …; /* * Holtek 6560A support * * This controller supports PIO0 to PIO2 (no IORDY even though higher * timings can be loaded). */ static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } static struct ata_port_operations ht6560a_port_ops = …; /* * Holtek 6560B support * * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO * setting unless we see an ATAPI device in which case we force it off. * * FIXME: need to implement 2nd channel support. */ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } static struct ata_port_operations ht6560b_port_ops = …; /* * Opti core chipset helpers */ /** * opti_syscfg - read OPTI chipset configuration * @reg: Configuration register to read * * Returns the value of an OPTI system board configuration register. */ static u8 opti_syscfg(u8 reg) { … } /* * Opti 82C611A * * This controller supports PIO0 to PIO3. */ static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } static struct ata_port_operations opti82c611a_port_ops = …; /* * Opti 82C465MV * * This controller supports PIO0 to PIO3. Unlike the 611A the MVB * version is dual channel but doesn't have a lot of unique registers. */ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } /** * opti82c46x_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap * this interface so that we can load the correct ATA timings. The * MVB has a single set of timing registers and these are shared * across channels. As there are two registers we really ought to * track the last two used values as a sort of register window. For * now we just reload on a channel switch. On the single channel * setup this condition never fires so we do nothing extra. * * FIXME: dual channel needs ->serialize support */ static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc) { … } static struct ata_port_operations opti82c46x_port_ops = …; /** * qdi65x0_set_piomode - PIO setup for QDI65x0 * @ap: Port * @adev: Device * * In single channel mode the 6580 has one clock per device and we can * avoid the requirement to clock switch. We also have to load the timing * into the right clock according to whether we are master or slave. * * In dual channel mode the 6580 has one clock per channel and we have * to software clockswitch in qc_issue. */ static void qdi65x0_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } /** * qdi_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap * this interface so that we can load the correct ATA timings. */ static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc) { … } static unsigned int vlb32_data_xfer(struct ata_queued_cmd *qc, unsigned char *buf, unsigned int buflen, int rw) { … } static int qdi_port(struct platform_device *dev, struct legacy_probe *lp, struct legacy_data *ld) { … } static struct ata_port_operations qdi6500_port_ops = …; static struct ata_port_operations qdi6580_port_ops = …; static struct ata_port_operations qdi6580dp_port_ops = …; static DEFINE_SPINLOCK(winbond_lock); static void winbond_writecfg(unsigned long port, u8 reg, u8 val) { … } static u8 winbond_readcfg(unsigned long port, u8 reg) { … } static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) { … } static int winbond_port(struct platform_device *dev, struct legacy_probe *lp, struct legacy_data *ld) { … } static struct ata_port_operations winbond_port_ops = …; static struct legacy_controller controllers[] = …; /** * probe_chip_type - Discover controller * @probe: Probe entry to check * * Probe an ATA port and identify the type of controller. We don't * check if the controller appears to be driveless at this point. */ static __init int probe_chip_type(struct legacy_probe *probe) { … } /** * legacy_init_one - attach a legacy interface * @probe: probe record * * Register an ISA bus IDE interface. Such interfaces are PIO and we * assume do not support IRQ sharing. */ static __init int legacy_init_one(struct legacy_probe *probe) { … } /** * legacy_check_special_cases - ATA special cases * @p: PCI device to check * @primary: set this if we find an ATA master * @secondary: set this if we find an ATA secondary * * A small number of vendors implemented early PCI ATA interfaces * on bridge logic without the ATA interface being PCI visible. * Where we have a matching PCI driver we must skip the relevant * device here. If we don't know about it then the legacy driver * is the right driver anyway. */ static void __init legacy_check_special_cases(struct pci_dev *p, int *primary, int *secondary) { … } static __init void probe_opti_vlb(void) { … } static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port) { … } static __init void probe_qdi_vlb(void) { … } /** * legacy_init - attach legacy interfaces * * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects. * Right now we do not scan the ide0 and ide1 address but should do so * for non PCI systems or systems with no PCI IDE legacy mode devices. * If you fix that note there are special cases to consider like VLB * drivers and CS5510/20. */ static __init int legacy_init(void) { … } static __exit void legacy_exit(void) { … } MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_VERSION(…); MODULE_ALIAS(…) …; MODULE_ALIAS(…) …; module_init(…) …; module_exit(legacy_exit);
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