// SPDX-License-Identifier: GPL-2.0-only /* * Samsung S3C64XX/S5PC1XX OneNAND driver * * Copyright © 2008-2010 Samsung Electronics * Kyungmin Park <[email protected]> * Marek Szyprowski <[email protected]> * * Implementation: * S3C64XX: emulate the pseudo BufferRAM * S5PC110: use DMA */ #include <linux/module.h> #include <linux/platform_device.h> #include <linux/sched.h> #include <linux/slab.h> #include <linux/mtd/mtd.h> #include <linux/mtd/onenand.h> #include <linux/mtd/partitions.h> #include <linux/dma-mapping.h> #include <linux/interrupt.h> #include <linux/io.h> #include "samsung.h" enum soc_type { … }; #define ONENAND_ERASE_STATUS … #define ONENAND_MULTI_ERASE_SET … #define ONENAND_ERASE_START … #define ONENAND_UNLOCK_START … #define ONENAND_UNLOCK_END … #define ONENAND_LOCK_START … #define ONENAND_LOCK_END … #define ONENAND_LOCK_TIGHT_START … #define ONENAND_LOCK_TIGHT_END … #define ONENAND_UNLOCK_ALL … #define ONENAND_OTP_ACCESS … #define ONENAND_SPARE_ACCESS_ONLY … #define ONENAND_MAIN_ACCESS_ONLY … #define ONENAND_ERASE_VERIFY … #define ONENAND_MAIN_SPARE_ACCESS … #define ONENAND_PIPELINE_READ … #define MAP_00 … #define MAP_01 … #define MAP_10 … #define MAP_11 … #define S3C64XX_CMD_MAP_SHIFT … #define S3C6400_FBA_SHIFT … #define S3C6400_FPA_SHIFT … #define S3C6400_FSA_SHIFT … #define S3C6410_FBA_SHIFT … #define S3C6410_FPA_SHIFT … #define S3C6410_FSA_SHIFT … /* S5PC110 specific definitions */ #define S5PC110_DMA_SRC_ADDR … #define S5PC110_DMA_SRC_CFG … #define S5PC110_DMA_DST_ADDR … #define S5PC110_DMA_DST_CFG … #define S5PC110_DMA_TRANS_SIZE … #define S5PC110_DMA_TRANS_CMD … #define S5PC110_DMA_TRANS_STATUS … #define S5PC110_DMA_TRANS_DIR … #define S5PC110_INTC_DMA_CLR … #define S5PC110_INTC_ONENAND_CLR … #define S5PC110_INTC_DMA_MASK … #define S5PC110_INTC_ONENAND_MASK … #define S5PC110_INTC_DMA_PEND … #define S5PC110_INTC_ONENAND_PEND … #define S5PC110_INTC_DMA_STATUS … #define S5PC110_INTC_ONENAND_STATUS … #define S5PC110_INTC_DMA_TD … #define S5PC110_INTC_DMA_TE … #define S5PC110_DMA_CFG_SINGLE … #define S5PC110_DMA_CFG_4BURST … #define S5PC110_DMA_CFG_8BURST … #define S5PC110_DMA_CFG_16BURST … #define S5PC110_DMA_CFG_INC … #define S5PC110_DMA_CFG_CNT … #define S5PC110_DMA_CFG_8BIT … #define S5PC110_DMA_CFG_16BIT … #define S5PC110_DMA_CFG_32BIT … #define S5PC110_DMA_SRC_CFG_READ … #define S5PC110_DMA_DST_CFG_READ … #define S5PC110_DMA_SRC_CFG_WRITE … #define S5PC110_DMA_DST_CFG_WRITE … #define S5PC110_DMA_TRANS_CMD_TDC … #define S5PC110_DMA_TRANS_CMD_TEC … #define S5PC110_DMA_TRANS_CMD_TR … #define S5PC110_DMA_TRANS_STATUS_TD … #define S5PC110_DMA_TRANS_STATUS_TB … #define S5PC110_DMA_TRANS_STATUS_TE … #define S5PC110_DMA_DIR_READ … #define S5PC110_DMA_DIR_WRITE … struct s3c_onenand { … }; #define CMD_MAP_00(dev, addr) … #define CMD_MAP_01(dev, mem_addr) … #define CMD_MAP_10(dev, mem_addr) … #define CMD_MAP_11(dev, addr) … static struct s3c_onenand *onenand; static inline int s3c_read_reg(int offset) { … } static inline void s3c_write_reg(int value, int offset) { … } static inline int s3c_read_cmd(unsigned int cmd) { … } static inline void s3c_write_cmd(int value, unsigned int cmd) { … } #ifdef SAMSUNG_DEBUG static void s3c_dump_reg(void) { int i; for (i = 0; i < 0x400; i += 0x40) { printk(KERN_INFO "0x%08X: 0x%08x 0x%08x 0x%08x 0x%08x\n", (unsigned int) onenand->base + i, s3c_read_reg(i), s3c_read_reg(i + 0x10), s3c_read_reg(i + 0x20), s3c_read_reg(i + 0x30)); } } #endif static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val) { … } static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa) { … } static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa) { … } static void s3c_onenand_reset(void) { … } static unsigned short s3c_onenand_readw(void __iomem *addr) { … } static void s3c_onenand_writew(unsigned short value, void __iomem *addr) { … } static int s3c_onenand_wait(struct mtd_info *mtd, int state) { … } static int s3c_onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) { … } static unsigned char *s3c_get_bufferram(struct mtd_info *mtd, int area) { … } static int onenand_read_bufferram(struct mtd_info *mtd, int area, unsigned char *buffer, int offset, size_t count) { … } static int onenand_write_bufferram(struct mtd_info *mtd, int area, const unsigned char *buffer, int offset, size_t count) { … } static int (*s5pc110_dma_ops)(dma_addr_t dst, dma_addr_t src, size_t count, int direction); static int s5pc110_dma_poll(dma_addr_t dst, dma_addr_t src, size_t count, int direction) { … } static irqreturn_t s5pc110_onenand_irq(int irq, void *data) { … } static int s5pc110_dma_irq(dma_addr_t dst, dma_addr_t src, size_t count, int direction) { … } static int s5pc110_read_bufferram(struct mtd_info *mtd, int area, unsigned char *buffer, int offset, size_t count) { … } static int s5pc110_chip_probe(struct mtd_info *mtd) { … } static int s3c_onenand_bbt_wait(struct mtd_info *mtd, int state) { … } static void s3c_onenand_check_lock_status(struct mtd_info *mtd) { … } static void s3c_onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) { … } static void s3c_unlock_all(struct mtd_info *mtd) { … } static void s3c_onenand_setup(struct mtd_info *mtd) { … } static int s3c_onenand_probe(struct platform_device *pdev) { … } static void s3c_onenand_remove(struct platform_device *pdev) { … } static int s3c_pm_ops_suspend(struct device *dev) { … } static int s3c_pm_ops_resume(struct device *dev) { … } static const struct dev_pm_ops s3c_pm_ops = …; static const struct platform_device_id s3c_onenand_driver_ids[] = …; MODULE_DEVICE_TABLE(platform, s3c_onenand_driver_ids); static struct platform_driver s3c_onenand_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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