linux/include/linux/mfd/wm8350/audio.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * audio.h  --  Audio Driver for Wolfson WM8350 PMIC
 *
 * Copyright 2007, 2008 Wolfson Microelectronics PLC
 */

#ifndef __LINUX_MFD_WM8350_AUDIO_H_
#define __LINUX_MFD_WM8350_AUDIO_H_

#include <linux/platform_device.h>

#define WM8350_CLOCK_CONTROL_1
#define WM8350_CLOCK_CONTROL_2
#define WM8350_FLL_CONTROL_1
#define WM8350_FLL_CONTROL_2
#define WM8350_FLL_CONTROL_3
#define WM8350_FLL_CONTROL_4
#define WM8350_DAC_CONTROL
#define WM8350_DAC_DIGITAL_VOLUME_L
#define WM8350_DAC_DIGITAL_VOLUME_R
#define WM8350_DAC_LR_RATE
#define WM8350_DAC_CLOCK_CONTROL
#define WM8350_DAC_MUTE
#define WM8350_DAC_MUTE_VOLUME
#define WM8350_DAC_SIDE
#define WM8350_ADC_CONTROL
#define WM8350_ADC_DIGITAL_VOLUME_L
#define WM8350_ADC_DIGITAL_VOLUME_R
#define WM8350_ADC_DIVIDER
#define WM8350_ADC_LR_RATE
#define WM8350_INPUT_CONTROL
#define WM8350_IN3_INPUT_CONTROL
#define WM8350_MIC_BIAS_CONTROL
#define WM8350_OUTPUT_CONTROL
#define WM8350_JACK_DETECT
#define WM8350_ANTI_POP_CONTROL
#define WM8350_LEFT_INPUT_VOLUME
#define WM8350_RIGHT_INPUT_VOLUME
#define WM8350_LEFT_MIXER_CONTROL
#define WM8350_RIGHT_MIXER_CONTROL
#define WM8350_OUT3_MIXER_CONTROL
#define WM8350_OUT4_MIXER_CONTROL
#define WM8350_OUTPUT_LEFT_MIXER_VOLUME
#define WM8350_OUTPUT_RIGHT_MIXER_VOLUME
#define WM8350_INPUT_MIXER_VOLUME_L
#define WM8350_INPUT_MIXER_VOLUME_R
#define WM8350_INPUT_MIXER_VOLUME
#define WM8350_LOUT1_VOLUME
#define WM8350_ROUT1_VOLUME
#define WM8350_LOUT2_VOLUME
#define WM8350_ROUT2_VOLUME
#define WM8350_BEEP_VOLUME
#define WM8350_AI_FORMATING
#define WM8350_ADC_DAC_COMP
#define WM8350_AI_ADC_CONTROL
#define WM8350_AI_DAC_CONTROL
#define WM8350_AIF_TEST
#define WM8350_JACK_PIN_STATUS

/* Bit values for R08 (0x08) */
#define WM8350_CODEC_ISEL_1_5
#define WM8350_CODEC_ISEL_1_0
#define WM8350_CODEC_ISEL_0_75
#define WM8350_CODEC_ISEL_0_5

#define WM8350_VMID_OFF
#define WM8350_VMID_300K
#define WM8350_VMID_50K
#define WM8350_VMID_5K

/*
 * R40 (0x28) - Clock Control 1
 */
#define WM8350_TOCLK_RATE
#define WM8350_MCLK_SEL
#define WM8350_MCLK_DIV_MASK
#define WM8350_BCLK_DIV_MASK
#define WM8350_OPCLK_DIV_MASK

/*
 * R41 (0x29) - Clock Control 2
 */
#define WM8350_LRC_ADC_SEL
#define WM8350_MCLK_DIR

/*
 * R42 (0x2A) - FLL Control 1
 */
#define WM8350_FLL_DITHER_WIDTH_MASK
#define WM8350_FLL_DITHER_HP
#define WM8350_FLL_OUTDIV_MASK
#define WM8350_FLL_RSP_RATE_MASK
#define WM8350_FLL_RATE_MASK

/*
 * R43 (0x2B) - FLL Control 2
 */
#define WM8350_FLL_RATIO_MASK
#define WM8350_FLL_N_MASK

/*
 * R44 (0x2C) - FLL Control 3
 */
#define WM8350_FLL_K_MASK

/*
 * R45 (0x2D) - FLL Control 4
 */
#define WM8350_FLL_FRAC
#define WM8350_FLL_SLOW_LOCK_REF
#define WM8350_FLL_CLK_SRC_MASK

/*
 * R48 (0x30) - DAC Control
 */
#define WM8350_DAC_MONO
#define WM8350_AIF_LRCLKRATE
#define WM8350_DEEMP_MASK
#define WM8350_DACL_DATINV
#define WM8350_DACR_DATINV

/*
 * R50 (0x32) - DAC Digital Volume L
 */
#define WM8350_DAC_VU
#define WM8350_DACL_VOL_MASK

/*
 * R51 (0x33) - DAC Digital Volume R
 */
#define WM8350_DAC_VU
#define WM8350_DACR_VOL_MASK

/*
 * R53 (0x35) - DAC LR Rate
 */
#define WM8350_DACLRC_ENA
#define WM8350_DACLRC_RATE_MASK

/*
 * R54 (0x36) - DAC Clock Control
 */
#define WM8350_DACCLK_POL
#define WM8350_DAC_CLKDIV_MASK

/*
 * R58 (0x3A) - DAC Mute
 */
#define WM8350_DAC_MUTE_ENA

/*
 * R59 (0x3B) - DAC Mute Volume
 */
#define WM8350_DAC_MUTEMODE
#define WM8350_DAC_MUTERATE
#define WM8350_DAC_SB_FILT

/*
 * R60 (0x3C) - DAC Side
 */
#define WM8350_ADC_TO_DACL_MASK
#define WM8350_ADC_TO_DACR_MASK

/*
 * R64 (0x40) - ADC Control
 */
#define WM8350_ADC_HPF_CUT_MASK
#define WM8350_ADCL_DATINV
#define WM8350_ADCR_DATINV

/*
 * R66 (0x42) - ADC Digital Volume L
 */
#define WM8350_ADC_VU
#define WM8350_ADCL_VOL_MASK

/*
 * R67 (0x43) - ADC Digital Volume R
 */
#define WM8350_ADC_VU
#define WM8350_ADCR_VOL_MASK

/*
 * R68 (0x44) - ADC Divider
 */
#define WM8350_ADCL_DAC_SVOL_MASK
#define WM8350_ADCR_DAC_SVOL_MASK
#define WM8350_ADCCLK_POL
#define WM8350_ADC_CLKDIV_MASK

/*
 * R70 (0x46) - ADC LR Rate
 */
#define WM8350_ADCLRC_ENA
#define WM8350_ADCLRC_RATE_MASK

/*
 * R72 (0x48) - Input Control
 */
#define WM8350_IN2R_ENA
#define WM8350_IN1RN_ENA
#define WM8350_IN1RP_ENA
#define WM8350_IN2L_ENA
#define WM8350_IN1LN_ENA
#define WM8350_IN1LP_ENA

/*
 * R73 (0x49) - IN3 Input Control
 */
#define WM8350_IN3R_SHORT
#define WM8350_IN3L_SHORT

/*
 * R74 (0x4A) - Mic Bias Control
 */
#define WM8350_MICBSEL
#define WM8350_MCDTHR_MASK
#define WM8350_MCDSCTHR_MASK

/*
 * R76 (0x4C) - Output Control
 */
#define WM8350_OUT4_VROI
#define WM8350_OUT3_VROI
#define WM8350_OUT2_VROI
#define WM8350_OUT1_VROI
#define WM8350_OUT2_FB
#define WM8350_OUT1_FB

/*
 * R77 (0x4D) - Jack Detect
 */
#define WM8350_JDL_ENA
#define WM8350_JDR_ENA

/*
 * R78 (0x4E) - Anti Pop Control
 */
#define WM8350_ANTI_POP_MASK
#define WM8350_DIS_OP_LN4_MASK
#define WM8350_DIS_OP_LN3_MASK
#define WM8350_DIS_OP_OUT2_MASK
#define WM8350_DIS_OP_OUT1_MASK

/*
 * R80 (0x50) - Left Input Volume
 */
#define WM8350_INL_MUTE
#define WM8350_INL_ZC
#define WM8350_IN_VU
#define WM8350_INL_VOL_MASK

/*
 * R81 (0x51) - Right Input Volume
 */
#define WM8350_INR_MUTE
#define WM8350_INR_ZC
#define WM8350_IN_VU
#define WM8350_INR_VOL_MASK

/*
 * R88 (0x58) - Left Mixer Control
 */
#define WM8350_DACR_TO_MIXOUTL
#define WM8350_DACL_TO_MIXOUTL
#define WM8350_IN3L_TO_MIXOUTL
#define WM8350_INR_TO_MIXOUTL
#define WM8350_INL_TO_MIXOUTL

/*
 * R89 (0x59) - Right Mixer Control
 */
#define WM8350_DACR_TO_MIXOUTR
#define WM8350_DACL_TO_MIXOUTR
#define WM8350_IN3R_TO_MIXOUTR
#define WM8350_INR_TO_MIXOUTR
#define WM8350_INL_TO_MIXOUTR

/*
 * R92 (0x5C) - OUT3 Mixer Control
 */
#define WM8350_DACL_TO_OUT3
#define WM8350_MIXINL_TO_OUT3
#define WM8350_OUT4_TO_OUT3
#define WM8350_MIXOUTL_TO_OUT3

/*
 * R93 (0x5D) - OUT4 Mixer Control
 */
#define WM8350_DACR_TO_OUT4
#define WM8350_DACL_TO_OUT4
#define WM8350_OUT4_ATTN
#define WM8350_MIXINR_TO_OUT4
#define WM8350_OUT3_TO_OUT4
#define WM8350_MIXOUTR_TO_OUT4
#define WM8350_MIXOUTL_TO_OUT4

/*
 * R96 (0x60) - Output Left Mixer Volume
 */
#define WM8350_IN3L_MIXOUTL_VOL_MASK
#define WM8350_IN3L_MIXOUTL_VOL_SHIFT
#define WM8350_INR_MIXOUTL_VOL_MASK
#define WM8350_INR_MIXOUTL_VOL_SHIFT
#define WM8350_INL_MIXOUTL_VOL_MASK
#define WM8350_INL_MIXOUTL_VOL_SHIFT

/* Bit values for R96 (0x60) */
#define WM8350_IN3L_MIXOUTL_VOL_OFF
#define WM8350_IN3L_MIXOUTL_VOL_M12DB
#define WM8350_IN3L_MIXOUTL_VOL_M9DB
#define WM8350_IN3L_MIXOUTL_VOL_M6DB
#define WM8350_IN3L_MIXOUTL_VOL_M3DB
#define WM8350_IN3L_MIXOUTL_VOL_0DB
#define WM8350_IN3L_MIXOUTL_VOL_3DB
#define WM8350_IN3L_MIXOUTL_VOL_6DB

#define WM8350_INR_MIXOUTL_VOL_OFF
#define WM8350_INR_MIXOUTL_VOL_M12DB
#define WM8350_INR_MIXOUTL_VOL_M9DB
#define WM8350_INR_MIXOUTL_VOL_M6DB
#define WM8350_INR_MIXOUTL_VOL_M3DB
#define WM8350_INR_MIXOUTL_VOL_0DB
#define WM8350_INR_MIXOUTL_VOL_3DB
#define WM8350_INR_MIXOUTL_VOL_6DB

#define WM8350_INL_MIXOUTL_VOL_OFF
#define WM8350_INL_MIXOUTL_VOL_M12DB
#define WM8350_INL_MIXOUTL_VOL_M9DB
#define WM8350_INL_MIXOUTL_VOL_M6DB
#define WM8350_INL_MIXOUTL_VOL_M3DB
#define WM8350_INL_MIXOUTL_VOL_0DB
#define WM8350_INL_MIXOUTL_VOL_3DB
#define WM8350_INL_MIXOUTL_VOL_6DB

/*
 * R97 (0x61) - Output Right Mixer Volume
 */
#define WM8350_IN3R_MIXOUTR_VOL_MASK
#define WM8350_IN3R_MIXOUTR_VOL_SHIFT
#define WM8350_INR_MIXOUTR_VOL_MASK
#define WM8350_INR_MIXOUTR_VOL_SHIFT
#define WM8350_INL_MIXOUTR_VOL_MASK
#define WM8350_INL_MIXOUTR_VOL_SHIFT

/* Bit values for R96 (0x60) */
#define WM8350_IN3R_MIXOUTR_VOL_OFF
#define WM8350_IN3R_MIXOUTR_VOL_M12DB
#define WM8350_IN3R_MIXOUTR_VOL_M9DB
#define WM8350_IN3R_MIXOUTR_VOL_M6DB
#define WM8350_IN3R_MIXOUTR_VOL_M3DB
#define WM8350_IN3R_MIXOUTR_VOL_0DB
#define WM8350_IN3R_MIXOUTR_VOL_3DB
#define WM8350_IN3R_MIXOUTR_VOL_6DB

#define WM8350_INR_MIXOUTR_VOL_OFF
#define WM8350_INR_MIXOUTR_VOL_M12DB
#define WM8350_INR_MIXOUTR_VOL_M9DB
#define WM8350_INR_MIXOUTR_VOL_M6DB
#define WM8350_INR_MIXOUTR_VOL_M3DB
#define WM8350_INR_MIXOUTR_VOL_0DB
#define WM8350_INR_MIXOUTR_VOL_3DB
#define WM8350_INR_MIXOUTR_VOL_6DB

#define WM8350_INL_MIXOUTR_VOL_OFF
#define WM8350_INL_MIXOUTR_VOL_M12DB
#define WM8350_INL_MIXOUTR_VOL_M9DB
#define WM8350_INL_MIXOUTR_VOL_M6DB
#define WM8350_INL_MIXOUTR_VOL_M3DB
#define WM8350_INL_MIXOUTR_VOL_0DB
#define WM8350_INL_MIXOUTR_VOL_3DB
#define WM8350_INL_MIXOUTR_VOL_6DB

/*
 * R98 (0x62) - Input Mixer Volume L
 */
#define WM8350_IN3L_MIXINL_VOL_MASK
#define WM8350_IN2L_MIXINL_VOL_MASK
#define WM8350_INL_MIXINL_VOL

/*
 * R99 (0x63) - Input Mixer Volume R
 */
#define WM8350_IN3R_MIXINR_VOL_MASK
#define WM8350_IN2R_MIXINR_VOL_MASK
#define WM8350_INR_MIXINR_VOL

/*
 * R100 (0x64) - Input Mixer Volume
 */
#define WM8350_OUT4_MIXIN_DST
#define WM8350_OUT4_MIXIN_VOL_MASK

/*
 * R104 (0x68) - LOUT1 Volume
 */
#define WM8350_OUT1L_MUTE
#define WM8350_OUT1L_ZC
#define WM8350_OUT1_VU
#define WM8350_OUT1L_VOL_MASK
#define WM8350_OUT1L_VOL_SHIFT

/*
 * R105 (0x69) - ROUT1 Volume
 */
#define WM8350_OUT1R_MUTE
#define WM8350_OUT1R_ZC
#define WM8350_OUT1_VU
#define WM8350_OUT1R_VOL_MASK
#define WM8350_OUT1R_VOL_SHIFT

/*
 * R106 (0x6A) - LOUT2 Volume
 */
#define WM8350_OUT2L_MUTE
#define WM8350_OUT2L_ZC
#define WM8350_OUT2_VU
#define WM8350_OUT2L_VOL_MASK

/*
 * R107 (0x6B) - ROUT2 Volume
 */
#define WM8350_OUT2R_MUTE
#define WM8350_OUT2R_ZC
#define WM8350_OUT2R_INV
#define WM8350_OUT2R_INV_MUTE
#define WM8350_OUT2_VU
#define WM8350_OUT2R_VOL_MASK

/*
 * R111 (0x6F) - BEEP Volume
 */
#define WM8350_IN3R_OUT2R_VOL_MASK

/*
 * R112 (0x70) - AI Formating
 */
#define WM8350_AIF_BCLK_INV
#define WM8350_AIF_TRI
#define WM8350_AIF_LRCLK_INV
#define WM8350_AIF_WL_MASK
#define WM8350_AIF_FMT_MASK

/*
 * R113 (0x71) - ADC DAC COMP
 */
#define WM8350_DAC_COMP
#define WM8350_DAC_COMPMODE
#define WM8350_ADC_COMP
#define WM8350_ADC_COMPMODE
#define WM8350_LOOPBACK

/*
 * R114 (0x72) - AI ADC Control
 */
#define WM8350_AIFADC_PD
#define WM8350_AIFADCL_SRC
#define WM8350_AIFADCR_SRC
#define WM8350_AIFADC_TDM_CHAN
#define WM8350_AIFADC_TDM

/*
 * R115 (0x73) - AI DAC Control
 */
#define WM8350_BCLK_MSTR
#define WM8350_AIFDAC_PD
#define WM8350_DACL_SRC
#define WM8350_DACR_SRC
#define WM8350_AIFDAC_TDM_CHAN
#define WM8350_AIFDAC_TDM
#define WM8350_DAC_BOOST_MASK

/*
 * R116 (0x74) - AIF Test
 */
#define WM8350_CODEC_BYP
#define WM8350_AIFADC_WR_TST
#define WM8350_AIFADC_RD_TST
#define WM8350_AIFDAC_WR_TST
#define WM8350_AIFDAC_RD_TST
#define WM8350_AIFADC_ASYN
#define WM8350_AIFDAC_ASYN

/*
 * R231 (0xE7) - Jack Status
 */
#define WM8350_JACK_L_LVL
#define WM8350_JACK_R_LVL
#define WM8350_JACK_MICSCD_LVL
#define WM8350_JACK_MICSD_LVL

/*
 * WM8350 Platform setup
 */
#define WM8350_S_CURVE_NONE
#define WM8350_S_CURVE_FAST
#define WM8350_S_CURVE_MEDIUM
#define WM8350_S_CURVE_SLOW

#define WM8350_DISCHARGE_OFF
#define WM8350_DISCHARGE_FAST
#define WM8350_DISCHARGE_MEDIUM
#define WM8350_DISCHARGE_SLOW

#define WM8350_TIE_OFF_500R
#define WM8350_TIE_OFF_30K

/*
 * Clock sources & directions
 */
#define WM8350_SYSCLK

#define WM8350_MCLK_SEL_PLL_MCLK
#define WM8350_MCLK_SEL_PLL_DAC
#define WM8350_MCLK_SEL_PLL_ADC
#define WM8350_MCLK_SEL_PLL_32K
#define WM8350_MCLK_SEL_MCLK

/* clock divider id's */
#define WM8350_ADC_CLKDIV
#define WM8350_DAC_CLKDIV
#define WM8350_BCLK_CLKDIV
#define WM8350_OPCLK_CLKDIV
#define WM8350_TO_CLKDIV
#define WM8350_SYS_CLKDIV
#define WM8350_DACLR_CLKDIV
#define WM8350_ADCLR_CLKDIV

/* ADC clock dividers */
#define WM8350_ADCDIV_1
#define WM8350_ADCDIV_1_5
#define WM8350_ADCDIV_2
#define WM8350_ADCDIV_3
#define WM8350_ADCDIV_4
#define WM8350_ADCDIV_5_5
#define WM8350_ADCDIV_6

/* ADC clock dividers */
#define WM8350_DACDIV_1
#define WM8350_DACDIV_1_5
#define WM8350_DACDIV_2
#define WM8350_DACDIV_3
#define WM8350_DACDIV_4
#define WM8350_DACDIV_5_5
#define WM8350_DACDIV_6

/* BCLK clock dividers */
#define WM8350_BCLK_DIV_1
#define WM8350_BCLK_DIV_1_5
#define WM8350_BCLK_DIV_2
#define WM8350_BCLK_DIV_3
#define WM8350_BCLK_DIV_4
#define WM8350_BCLK_DIV_5_5
#define WM8350_BCLK_DIV_6
#define WM8350_BCLK_DIV_8
#define WM8350_BCLK_DIV_11
#define WM8350_BCLK_DIV_12
#define WM8350_BCLK_DIV_16
#define WM8350_BCLK_DIV_22
#define WM8350_BCLK_DIV_24
#define WM8350_BCLK_DIV_32
#define WM8350_BCLK_DIV_44
#define WM8350_BCLK_DIV_48

/* Sys (MCLK) clock dividers */
#define WM8350_MCLK_DIV_1
#define WM8350_MCLK_DIV_2

/* OP clock dividers */
#define WM8350_OPCLK_DIV_1
#define WM8350_OPCLK_DIV_2
#define WM8350_OPCLK_DIV_3
#define WM8350_OPCLK_DIV_4
#define WM8350_OPCLK_DIV_5_5
#define WM8350_OPCLK_DIV_6

/* DAI ID */
#define WM8350_HIFI_DAI

/*
 * Audio interrupts.
 */
#define WM8350_IRQ_CODEC_JCK_DET_L
#define WM8350_IRQ_CODEC_JCK_DET_R
#define WM8350_IRQ_CODEC_MICSCD
#define WM8350_IRQ_CODEC_MICD

/*
 * WM8350 Platform data.
 *
 * This must be initialised per platform for best audio performance.
 * Please see WM8350 datasheet for information.
 */
struct wm8350_audio_platform_data {};

struct wm8350_codec {};

#endif