/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2009 - Maxim Levitsky * driver for Ricoh xD readers */ #include <linux/pci.h> #include <linux/completion.h> #include <linux/workqueue.h> #include <linux/mtd/rawnand.h> #include <linux/spinlock.h> /* nand interface + ecc byte write/read does one cycle on nand data lines. dword write/read does 4 cycles if R852_CTL_ECC_ACCESS is set in R852_CTL, then dword read reads results of ecc correction, if DMA read was done before. If write was done two dword reads read generated ecc checksums */ #define R852_DATALINE … /* control register */ #define R852_CTL … #define R852_CTL_COMMAND … #define R852_CTL_DATA … #define R852_CTL_ON … /* but has to be set on start...*/ #define R852_CTL_RESET … #define R852_CTL_CARDENABLE … #define R852_CTL_ECC_ENABLE … #define R852_CTL_ECC_ACCESS … #define R852_CTL_WRITE … /* card detection status */ #define R852_CARD_STA … #define R852_CARD_STA_CD … #define R852_CARD_STA_RO … #define R852_CARD_STA_PRESENT … #define R852_CARD_STA_ABSENT … #define R852_CARD_STA_BUSY … /* card detection irq status & enable*/ #define R852_CARD_IRQ_STA … #define R852_CARD_IRQ_ENABLE … #define R852_CARD_IRQ_CD … #define R852_CARD_IRQ_REMOVE … #define R852_CARD_IRQ_INSERT … #define R852_CARD_IRQ_UNK1 … #define R852_CARD_IRQ_GENABLE … #define R852_CARD_IRQ_MASK … /* hardware enable */ #define R852_HW … #define R852_HW_ENABLED … #define R852_HW_UNKNOWN … /* dma capabilities */ #define R852_DMA_CAP … #define R852_SMBIT … /* hw is smartmedia */ #define R852_DMA1 … #define R852_DMA2 … /* physical DMA address - 32 bit value*/ #define R852_DMA_ADDR … /* dma settings */ #define R852_DMA_SETTINGS … #define R852_DMA_MEMORY … #define R852_DMA_READ … #define R852_DMA_INTERNAL … /* dma IRQ status */ #define R852_DMA_IRQ_STA … /* dma IRQ enable */ #define R852_DMA_IRQ_ENABLE … #define R852_DMA_IRQ_MEMORY … #define R852_DMA_IRQ_ERROR … #define R852_DMA_IRQ_INTERNAL … #define R852_DMA_IRQ_MASK … /* ECC syndrome format - read from reg #0 will return two copies of these for each half of the page. first byte is error byte location, and second, bit location + flags */ #define R852_ECC_ERR_BIT_MSK … #define R852_ECC_CORRECT … #define R852_ECC_CORRECTABLE … #define R852_ECC_FAIL … #define R852_DMA_LEN … #define DMA_INTERNAL … #define DMA_MEMORY … struct r852_device { … }; #define dbg(format, ...) … #define dbg_verbose(format, ...) … #define message(format, ...) …
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