linux/drivers/mtd/nand/raw/mtk_nand.c

// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * MTK NAND Flash controller driver.
 * Copyright (C) 2016 MediaTek Inc.
 * Authors:	Xiaolei Li		<[email protected]>
 *		Jorge Ramirez-Ortiz	<[email protected]>
 */

#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/module.h>
#include <linux/iopoll.h>
#include <linux/of.h>
#include <linux/mtd/nand-ecc-mtk.h>

/* NAND controller register definition */
#define NFI_CNFG
#define CNFG_AHB
#define CNFG_READ_EN
#define CNFG_DMA_BURST_EN
#define CNFG_BYTE_RW
#define CNFG_HW_ECC_EN
#define CNFG_AUTO_FMT_EN
#define CNFG_OP_CUST
#define NFI_PAGEFMT
#define PAGEFMT_FDM_ECC_SHIFT
#define PAGEFMT_FDM_SHIFT
#define PAGEFMT_SEC_SEL_512
#define PAGEFMT_512_2K
#define PAGEFMT_2K_4K
#define PAGEFMT_4K_8K
#define PAGEFMT_8K_16K
/* NFI control */
#define NFI_CON
#define CON_FIFO_FLUSH
#define CON_NFI_RST
#define CON_BRD
#define CON_BWR
#define CON_SEC_SHIFT
/* Timming control register */
#define NFI_ACCCON
#define NFI_INTR_EN
#define INTR_AHB_DONE_EN
#define NFI_INTR_STA
#define NFI_CMD
#define NFI_ADDRNOB
#define NFI_COLADDR
#define NFI_ROWADDR
#define NFI_STRDATA
#define STAR_EN
#define STAR_DE
#define NFI_CNRNB
#define NFI_DATAW
#define NFI_DATAR
#define NFI_PIO_DIRDY
#define PIO_DI_RDY
#define NFI_STA
#define STA_CMD
#define STA_ADDR
#define STA_BUSY
#define STA_EMP_PAGE
#define NFI_FSM_CUSTDATA
#define NFI_FSM_MASK
#define NFI_ADDRCNTR
#define CNTR_MASK
#define ADDRCNTR_SEC_SHIFT
#define ADDRCNTR_SEC(val)
#define NFI_STRADDR
#define NFI_BYTELEN
#define NFI_CSEL
#define NFI_FDML(x)
#define NFI_FDMM(x)
#define NFI_FDM_MAX_SIZE
#define NFI_FDM_MIN_SIZE
#define NFI_DEBUG_CON1
#define STROBE_MASK
#define STROBE_SHIFT
#define MAX_STROBE_DLY
#define NFI_MASTER_STA
#define MASTER_STA_MASK
#define NFI_EMPTY_THRESH

#define MTK_NAME
#define KB(x)
#define MB(x)

#define MTK_TIMEOUT
#define MTK_RESET_TIMEOUT
#define MTK_NAND_MAX_NSELS
#define MTK_NFC_MIN_SPARE
#define ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt)

struct mtk_nfc_caps {};

struct mtk_nfc_bad_mark_ctl {};

/*
 * FDM: region used to store free OOB data
 */
struct mtk_nfc_fdm {};

struct mtk_nfc_nand_chip {};

struct mtk_nfc_clk {};

struct mtk_nfc {};

/*
 * supported spare size of each IP.
 * order should be the same with the spare size bitfiled defination of
 * register NFI_PAGEFMT.
 */
static const u8 spare_size_mt2701[] =;

static const u8 spare_size_mt2712[] =;

static const u8 spare_size_mt7622[] =;

static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand)
{}

static inline u8 *data_ptr(struct nand_chip *chip, const u8 *p, int i)
{}

static inline u8 *oob_ptr(struct nand_chip *chip, int i)
{}

static inline int mtk_data_len(struct nand_chip *chip)
{}

static inline u8 *mtk_data_ptr(struct nand_chip *chip,  int i)
{}

static inline u8 *mtk_oob_ptr(struct nand_chip *chip, int i)
{}

static inline void nfi_writel(struct mtk_nfc *nfc, u32 val, u32 reg)
{}

static inline void nfi_writew(struct mtk_nfc *nfc, u16 val, u32 reg)
{}

static inline void nfi_writeb(struct mtk_nfc *nfc, u8 val, u32 reg)
{}

static inline u32 nfi_readl(struct mtk_nfc *nfc, u32 reg)
{}

static inline u16 nfi_readw(struct mtk_nfc *nfc, u32 reg)
{}

static inline u8 nfi_readb(struct mtk_nfc *nfc, u32 reg)
{}

static void mtk_nfc_hw_reset(struct mtk_nfc *nfc)
{}

static int mtk_nfc_send_command(struct mtk_nfc *nfc, u8 command)
{}

static int mtk_nfc_send_address(struct mtk_nfc *nfc, int addr)
{}

static int mtk_nfc_hw_runtime_config(struct mtd_info *mtd)
{}

static inline void mtk_nfc_wait_ioready(struct mtk_nfc *nfc)
{}

static inline u8 mtk_nfc_read_byte(struct nand_chip *chip)
{}

static void mtk_nfc_read_buf(struct nand_chip *chip, u8 *buf, int len)
{}

static void mtk_nfc_write_byte(struct nand_chip *chip, u8 byte)
{}

static void mtk_nfc_write_buf(struct nand_chip *chip, const u8 *buf, int len)
{}

static int mtk_nfc_exec_instr(struct nand_chip *chip,
			      const struct nand_op_instr *instr)
{}

static void mtk_nfc_select_target(struct nand_chip *nand, unsigned int cs)
{}

static int mtk_nfc_exec_op(struct nand_chip *chip,
			   const struct nand_operation *op,
			   bool check_only)
{}

static int mtk_nfc_setup_interface(struct nand_chip *chip, int csline,
				   const struct nand_interface_config *conf)
{}

static int mtk_nfc_sector_encode(struct nand_chip *chip, u8 *data)
{}

static void mtk_nfc_no_bad_mark_swap(struct mtd_info *a, u8 *b, int c)
{}

static void mtk_nfc_bad_mark_swap(struct mtd_info *mtd, u8 *buf, int raw)
{}

static int mtk_nfc_format_subpage(struct mtd_info *mtd, u32 offset,
				  u32 len, const u8 *buf)
{}

static void mtk_nfc_format_page(struct mtd_info *mtd, const u8 *buf)
{}

static inline void mtk_nfc_read_fdm(struct nand_chip *chip, u32 start,
				    u32 sectors)
{}

static inline void mtk_nfc_write_fdm(struct nand_chip *chip)
{}

static int mtk_nfc_do_write_page(struct mtd_info *mtd, struct nand_chip *chip,
				 const u8 *buf, int page, int len)
{}

static int mtk_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
			      const u8 *buf, int page, int raw)
{}

static int mtk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf,
				    int oob_on, int page)
{}

static int mtk_nfc_write_page_raw(struct nand_chip *chip, const u8 *buf,
				  int oob_on, int pg)
{}

static int mtk_nfc_write_subpage_hwecc(struct nand_chip *chip, u32 offset,
				       u32 data_len, const u8 *buf,
				       int oob_on, int page)
{}

static int mtk_nfc_write_oob_std(struct nand_chip *chip, int page)
{}

static int mtk_nfc_update_ecc_stats(struct mtd_info *mtd, u8 *buf, u32 start,
				    u32 sectors)
{}

static int mtk_nfc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
				u32 data_offs, u32 readlen,
				u8 *bufpoi, int page, int raw)
{}

static int mtk_nfc_read_subpage_hwecc(struct nand_chip *chip, u32 off,
				      u32 len, u8 *p, int pg)
{}

static int mtk_nfc_read_page_hwecc(struct nand_chip *chip, u8 *p, int oob_on,
				   int pg)
{}

static int mtk_nfc_read_page_raw(struct nand_chip *chip, u8 *buf, int oob_on,
				 int page)
{}

static int mtk_nfc_read_oob_std(struct nand_chip *chip, int page)
{}

static inline void mtk_nfc_hw_init(struct mtk_nfc *nfc)
{}

static irqreturn_t mtk_nfc_irq(int irq, void *id)
{}

static int mtk_nfc_ooblayout_free(struct mtd_info *mtd, int section,
				  struct mtd_oob_region *oob_region)
{}

static int mtk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
				 struct mtd_oob_region *oob_region)
{}

static const struct mtd_ooblayout_ops mtk_nfc_ooblayout_ops =;

static void mtk_nfc_set_fdm(struct mtk_nfc_fdm *fdm, struct mtd_info *mtd)
{}

static void mtk_nfc_set_bad_mark_ctl(struct mtk_nfc_bad_mark_ctl *bm_ctl,
				     struct mtd_info *mtd)
{}

static int mtk_nfc_set_spare_per_sector(u32 *sps, struct mtd_info *mtd)
{}

static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
{}

static int mtk_nfc_attach_chip(struct nand_chip *chip)
{}

static const struct nand_controller_ops mtk_nfc_controller_ops =;

static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
				  struct device_node *np)
{}

static int mtk_nfc_nand_chips_init(struct device *dev, struct mtk_nfc *nfc)
{}

static const struct mtk_nfc_caps mtk_nfc_caps_mt2701 =;

static const struct mtk_nfc_caps mtk_nfc_caps_mt2712 =;

static const struct mtk_nfc_caps mtk_nfc_caps_mt7622 =;

static const struct of_device_id mtk_nfc_id_table[] =;
MODULE_DEVICE_TABLE(of, mtk_nfc_id_table);

static int mtk_nfc_probe(struct platform_device *pdev)
{}

static void mtk_nfc_remove(struct platform_device *pdev)
{}

#ifdef CONFIG_PM_SLEEP
static int mtk_nfc_suspend(struct device *dev)
{}

static int mtk_nfc_resume(struct device *dev)
{}

static SIMPLE_DEV_PM_OPS(mtk_nfc_pm_ops, mtk_nfc_suspend, mtk_nfc_resume);
#endif

static struct platform_driver mtk_nfc_driver =;

module_platform_driver();

MODULE_LICENSE();
MODULE_AUTHOR();
MODULE_DESCRIPTION();