// SPDX-License-Identifier: GPL-2.0-only /* * Driver for Atmel Pulse Width Modulation Controller * * Copyright (C) 2013 Atmel Corporation * Bo Shen <[email protected]> * * Links to reference manuals for the supported PWM chips can be found in * Documentation/arch/arm/microchip.rst. * * Limitations: * - Periods start with the inactive level. * - Hardware has to be stopped in general to update settings. * * Software bugs/possible improvements: * - When atmel_pwm_apply() is called with state->enabled=false a change in * state->polarity isn't honored. * - Instead of sleeping to wait for a completed period, the interrupt * functionality could be used. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/pwm.h> #include <linux/slab.h> /* The following is global registers for PWM controller */ #define PWM_ENA … #define PWM_DIS … #define PWM_SR … #define PWM_ISR … /* Bit field in SR */ #define PWM_SR_ALL_CH_MASK … /* The following register is PWM channel related registers */ #define PWM_CH_REG_OFFSET … #define PWM_CH_REG_SIZE … #define PWM_CMR … /* Bit field in CMR */ #define PWM_CMR_CPOL … #define PWM_CMR_UPD_CDTY … #define PWM_CMR_CPRE_MSK … /* The following registers for PWM v1 */ #define PWMV1_CDTY … #define PWMV1_CPRD … #define PWMV1_CUPD … /* The following registers for PWM v2 */ #define PWMV2_CDTY … #define PWMV2_CDTYUPD … #define PWMV2_CPRD … #define PWMV2_CPRDUPD … #define PWM_MAX_PRES … struct atmel_pwm_registers { … }; struct atmel_pwm_config { … }; struct atmel_pwm_data { … }; struct atmel_pwm_chip { … }; static inline struct atmel_pwm_chip *to_atmel_pwm_chip(struct pwm_chip *chip) { … } static inline u32 atmel_pwm_readl(struct atmel_pwm_chip *chip, unsigned long offset) { … } static inline void atmel_pwm_writel(struct atmel_pwm_chip *chip, unsigned long offset, unsigned long val) { … } static inline u32 atmel_pwm_ch_readl(struct atmel_pwm_chip *chip, unsigned int ch, unsigned long offset) { … } static inline void atmel_pwm_ch_writel(struct atmel_pwm_chip *chip, unsigned int ch, unsigned long offset, unsigned long val) { … } static void atmel_pwm_update_pending(struct atmel_pwm_chip *chip) { … } static void atmel_pwm_set_pending(struct atmel_pwm_chip *chip, unsigned int ch) { … } static int atmel_pwm_test_pending(struct atmel_pwm_chip *chip, unsigned int ch) { … } static int atmel_pwm_wait_nonpending(struct atmel_pwm_chip *chip, unsigned int ch) { … } static int atmel_pwm_calculate_cprd_and_pres(struct pwm_chip *chip, unsigned long clkrate, const struct pwm_state *state, unsigned long *cprd, u32 *pres) { … } static void atmel_pwm_calculate_cdty(const struct pwm_state *state, unsigned long clkrate, unsigned long cprd, u32 pres, unsigned long *cdty) { … } static void atmel_pwm_update_cdty(struct pwm_chip *chip, struct pwm_device *pwm, unsigned long cdty) { … } static void atmel_pwm_set_cprd_cdty(struct pwm_chip *chip, struct pwm_device *pwm, unsigned long cprd, unsigned long cdty) { … } static void atmel_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm, bool disable_clk) { … } static int atmel_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { … } static int atmel_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { … } static const struct pwm_ops atmel_pwm_ops = …; static const struct atmel_pwm_data atmel_sam9rl_pwm_data = …; static const struct atmel_pwm_data atmel_sama5_pwm_data = …; static const struct atmel_pwm_data mchp_sam9x60_pwm_data = …; static const struct of_device_id atmel_pwm_dt_ids[] = …; MODULE_DEVICE_TABLE(of, atmel_pwm_dt_ids); static int atmel_pwm_enable_clk_if_on(struct pwm_chip *chip, bool on) { … } static int atmel_pwm_probe(struct platform_device *pdev) { … } static struct platform_driver atmel_pwm_driver = …; module_platform_driver(…) …; MODULE_ALIAS(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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