// SPDX-License-Identifier: GPL-2.0 /* * Support for Macronix external hardware ECC engine for NAND devices, also * called DPE for Data Processing Engine. * * Copyright © 2019 Macronix * Author: Miquel Raynal <[email protected]> */ #include <linux/dma-mapping.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/nand-ecc-mxic.h> #include <linux/mutex.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/slab.h> /* DPE Configuration */ #define DP_CONFIG … #define ECC_EN … #define ECC_TYP(idx) … /* DPE Interrupt Status */ #define INTRPT_STS … #define TRANS_CMPLT … #define SDMA_MAIN … #define SDMA_SPARE … #define ECC_ERR … #define TO_SPARE … #define TO_MAIN … /* DPE Interrupt Status Enable */ #define INTRPT_STS_EN … /* DPE Interrupt Signal Enable */ #define INTRPT_SIG_EN … /* Host Controller Configuration */ #define HC_CONFIG … #define DEV2MEM … #define MEM2MEM … #define MAPPING … #define ECC_PACKED … #define ECC_INTERLEAVED … #define BURST_TYP_FIXED … #define BURST_TYP_INCREASING … /* Host Controller Slave Address */ #define HC_SLV_ADDR … /* ECC Chunk Size */ #define CHUNK_SIZE … /* Main Data Size */ #define MAIN_SIZE … /* Spare Data Size */ #define SPARE_SIZE … #define META_SZ(reg) … #define PARITY_SZ(reg) … #define RSV_SZ(reg) … #define SPARE_SZ(reg) … /* ECC Chunk Count */ #define CHUNK_CNT … /* SDMA Control */ #define SDMA_CTRL … #define WRITE_NAND … #define READ_NAND … #define CONT_NAND … #define CONT_SYSM … #define SDMA_STRT … /* SDMA Address of Main Data */ #define SDMA_MAIN_ADDR … /* SDMA Address of Spare Data */ #define SDMA_SPARE_ADDR … /* DPE Version Number */ #define DP_VER … #define DP_VER_OFFSET … /* Status bytes between each chunk of spare data */ #define STAT_BYTES … #define NO_ERR … #define MAX_CORR_ERR … #define UNCORR_ERR … #define ERASED_CHUNK … struct mxic_ecc_engine { … }; struct mxic_ecc_ctx { … }; static struct mxic_ecc_engine *ext_ecc_eng_to_mxic(struct nand_ecc_engine *eng) { … } static struct mxic_ecc_engine *pip_ecc_eng_to_mxic(struct nand_ecc_engine *eng) { … } static struct mxic_ecc_engine *nand_to_mxic(struct nand_device *nand) { … } static int mxic_ecc_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *oobregion) { … } static int mxic_ecc_ooblayout_free(struct mtd_info *mtd, int section, struct mtd_oob_region *oobregion) { … } static const struct mtd_ooblayout_ops mxic_ecc_ooblayout_ops = …; static void mxic_ecc_disable_engine(struct mxic_ecc_engine *mxic) { … } static void mxic_ecc_enable_engine(struct mxic_ecc_engine *mxic) { … } static void mxic_ecc_disable_int(struct mxic_ecc_engine *mxic) { … } static void mxic_ecc_enable_int(struct mxic_ecc_engine *mxic) { … } static irqreturn_t mxic_ecc_isr(int irq, void *dev_id) { … } static int mxic_ecc_init_ctx(struct nand_device *nand, struct device *dev) { … } static int mxic_ecc_init_ctx_external(struct nand_device *nand) { … } static int mxic_ecc_init_ctx_pipelined(struct nand_device *nand) { … } static void mxic_ecc_cleanup_ctx(struct nand_device *nand) { … } static int mxic_ecc_data_xfer_wait_for_completion(struct mxic_ecc_engine *mxic) { … } static int mxic_ecc_process_data(struct mxic_ecc_engine *mxic, unsigned int direction) { … } int mxic_ecc_process_data_pipelined(struct nand_ecc_engine *eng, unsigned int direction, dma_addr_t dirmap) { … } EXPORT_SYMBOL_GPL(…); static void mxic_ecc_extract_status_bytes(struct mxic_ecc_ctx *ctx) { … } static void mxic_ecc_reconstruct_oobbuf(struct mxic_ecc_ctx *ctx, u8 *dst, const u8 *src) { … } static void mxic_ecc_add_room_in_oobbuf(struct mxic_ecc_ctx *ctx, u8 *dst, const u8 *src) { … } static int mxic_ecc_count_biterrs(struct mxic_ecc_engine *mxic, struct nand_device *nand) { … } /* External ECC engine helpers */ static int mxic_ecc_prepare_io_req_external(struct nand_device *nand, struct nand_page_io_req *req) { … } static int mxic_ecc_finish_io_req_external(struct nand_device *nand, struct nand_page_io_req *req) { … } /* Pipelined ECC engine helpers */ static int mxic_ecc_prepare_io_req_pipelined(struct nand_device *nand, struct nand_page_io_req *req) { … } static int mxic_ecc_finish_io_req_pipelined(struct nand_device *nand, struct nand_page_io_req *req) { … } static struct nand_ecc_engine_ops mxic_ecc_engine_external_ops = …; static struct nand_ecc_engine_ops mxic_ecc_engine_pipelined_ops = …; struct nand_ecc_engine_ops *mxic_ecc_get_pipelined_ops(void) { … } EXPORT_SYMBOL_GPL(…); static struct platform_device * mxic_ecc_get_pdev(struct platform_device *spi_pdev) { … } void mxic_ecc_put_pipelined_engine(struct nand_ecc_engine *eng) { … } EXPORT_SYMBOL_GPL(…); struct nand_ecc_engine * mxic_ecc_get_pipelined_engine(struct platform_device *spi_pdev) { … } EXPORT_SYMBOL_GPL(…); /* * Only the external ECC engine is exported as the pipelined is SoC specific, so * it is registered directly by the drivers that wrap it. */ static int mxic_ecc_probe(struct platform_device *pdev) { … } static void mxic_ecc_remove(struct platform_device *pdev) { … } static const struct of_device_id mxic_ecc_of_ids[] = …; MODULE_DEVICE_TABLE(of, mxic_ecc_of_ids); static struct platform_driver mxic_ecc_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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