// SPDX-License-Identifier: GPL-2.0-or-later /* * HiSilicon FMC SPI NOR flash controller driver * * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd. */ #include <linux/bitops.h> #include <linux/clk.h> #include <linux/dma-mapping.h> #include <linux/iopoll.h> #include <linux/module.h> #include <linux/mtd/mtd.h> #include <linux/mtd/spi-nor.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/slab.h> /* Hardware register offsets and field definitions */ #define FMC_CFG … #define FMC_CFG_OP_MODE_MASK … #define FMC_CFG_OP_MODE_BOOT … #define FMC_CFG_OP_MODE_NORMAL … #define FMC_CFG_FLASH_SEL(type) … #define FMC_CFG_FLASH_SEL_MASK … #define FMC_ECC_TYPE(type) … #define FMC_ECC_TYPE_MASK … #define SPI_NOR_ADDR_MODE_MASK … #define SPI_NOR_ADDR_MODE_3BYTES … #define SPI_NOR_ADDR_MODE_4BYTES … #define FMC_GLOBAL_CFG … #define FMC_GLOBAL_CFG_WP_ENABLE … #define FMC_SPI_TIMING_CFG … #define TIMING_CFG_TCSH(nr) … #define TIMING_CFG_TCSS(nr) … #define TIMING_CFG_TSHSL(nr) … #define CS_HOLD_TIME … #define CS_SETUP_TIME … #define CS_DESELECT_TIME … #define FMC_INT … #define FMC_INT_OP_DONE … #define FMC_INT_CLR … #define FMC_CMD … #define FMC_CMD_CMD1(cmd) … #define FMC_ADDRL … #define FMC_OP_CFG … #define OP_CFG_FM_CS(cs) … #define OP_CFG_MEM_IF_TYPE(type) … #define OP_CFG_ADDR_NUM(addr) … #define OP_CFG_DUMMY_NUM(dummy) … #define FMC_DATA_NUM … #define FMC_DATA_NUM_CNT(cnt) … #define FMC_OP … #define FMC_OP_DUMMY_EN … #define FMC_OP_CMD1_EN … #define FMC_OP_ADDR_EN … #define FMC_OP_WRITE_DATA_EN … #define FMC_OP_READ_DATA_EN … #define FMC_OP_READ_STATUS_EN … #define FMC_OP_REG_OP_START … #define FMC_DMA_LEN … #define FMC_DMA_LEN_SET(len) … #define FMC_DMA_SADDR_D0 … #define HIFMC_DMA_MAX_LEN … #define HIFMC_DMA_MASK … #define FMC_OP_DMA … #define OP_CTRL_RD_OPCODE(code) … #define OP_CTRL_WR_OPCODE(code) … #define OP_CTRL_RW_OP(op) … #define OP_CTRL_DMA_OP_READY … #define FMC_OP_READ … #define FMC_OP_WRITE … #define FMC_WAIT_TIMEOUT … enum hifmc_iftype { … }; struct hifmc_priv { … }; #define HIFMC_MAX_CHIP_NUM … struct hifmc_host { … }; static inline int hisi_spi_nor_wait_op_finish(struct hifmc_host *host) { … } static int hisi_spi_nor_get_if_type(enum spi_nor_protocol proto) { … } static void hisi_spi_nor_init(struct hifmc_host *host) { … } static int hisi_spi_nor_prep(struct spi_nor *nor) { … } static void hisi_spi_nor_unprep(struct spi_nor *nor) { … } static int hisi_spi_nor_op_reg(struct spi_nor *nor, u8 opcode, size_t len, u8 optype) { … } static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, size_t len) { … } static int hisi_spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf, size_t len) { … } static int hisi_spi_nor_dma_transfer(struct spi_nor *nor, loff_t start_off, dma_addr_t dma_buf, size_t len, u8 op_type) { … } static ssize_t hisi_spi_nor_read(struct spi_nor *nor, loff_t from, size_t len, u_char *read_buf) { … } static ssize_t hisi_spi_nor_write(struct spi_nor *nor, loff_t to, size_t len, const u_char *write_buf) { … } static const struct spi_nor_controller_ops hisi_controller_ops = …; /* * Get spi flash device information and register it as a mtd device. */ static int hisi_spi_nor_register(struct device_node *np, struct hifmc_host *host) { … } static void hisi_spi_nor_unregister_all(struct hifmc_host *host) { … } static int hisi_spi_nor_register_all(struct hifmc_host *host) { … } static int hisi_spi_nor_probe(struct platform_device *pdev) { … } static void hisi_spi_nor_remove(struct platform_device *pdev) { … } static const struct of_device_id hisi_spi_nor_dt_ids[] = …; MODULE_DEVICE_TABLE(of, hisi_spi_nor_dt_ids); static struct platform_driver hisi_spi_nor_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …;
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