// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2005, Intec Automation Inc. * Copyright (C) 2014, Freescale Semiconductor, Inc. */ #include <linux/bitfield.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/mtd/spi-nor.h> #include "core.h" /* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */ #define USE_CLSR … #define USE_CLPEF … #define SPINOR_OP_CLSR … #define SPINOR_OP_CLPEF … #define SPINOR_OP_CYPRESS_DIE_ERASE … #define SPINOR_OP_RD_ANY_REG … #define SPINOR_OP_WR_ANY_REG … #define SPINOR_REG_CYPRESS_VREG … #define SPINOR_REG_CYPRESS_STR1 … #define SPINOR_REG_CYPRESS_STR1V … #define SPINOR_REG_CYPRESS_CFR1 … #define SPINOR_REG_CYPRESS_CFR1_QUAD_EN … #define SPINOR_REG_CYPRESS_CFR2 … #define SPINOR_REG_CYPRESS_CFR2V … #define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK … #define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 … #define SPINOR_REG_CYPRESS_CFR2_ADRBYT … #define SPINOR_REG_CYPRESS_CFR3 … #define SPINOR_REG_CYPRESS_CFR3_PGSZ … #define SPINOR_REG_CYPRESS_CFR5 … #define SPINOR_REG_CYPRESS_CFR5_BIT6 … #define SPINOR_REG_CYPRESS_CFR5_DDR … #define SPINOR_REG_CYPRESS_CFR5_OPI … #define SPINOR_REG_CYPRESS_CFR5_OCT_DTR_EN … #define SPINOR_REG_CYPRESS_CFR5_OCT_DTR_DS … #define SPINOR_OP_CYPRESS_RD_FAST … #define SPINOR_REG_CYPRESS_ARCFN … /* Cypress SPI NOR flash operations. */ #define CYPRESS_NOR_WR_ANY_REG_OP(naddr, addr, ndata, buf) … #define CYPRESS_NOR_RD_ANY_REG_OP(naddr, addr, ndummy, buf) … #define SPANSION_OP(opcode) … /** * struct spansion_nor_params - Spansion private parameters. * @clsr: Clear Status Register or Clear Program and Erase Failure Flag * opcode. */ struct spansion_nor_params { … }; /** * spansion_nor_clear_sr() - Clear the Status Register. * @nor: pointer to 'struct spi_nor'. */ static void spansion_nor_clear_sr(struct spi_nor *nor) { … } static int cypress_nor_sr_ready_and_clear_reg(struct spi_nor *nor, u64 addr) { … } /** * cypress_nor_sr_ready_and_clear() - Query the Status Register of each die by * using Read Any Register command to see if the whole flash is ready for new * commands and clear it if there are any errors. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ static int cypress_nor_sr_ready_and_clear(struct spi_nor *nor) { … } static int cypress_nor_set_memlat(struct spi_nor *nor, u64 addr) { … } static int cypress_nor_set_octal_dtr_bits(struct spi_nor *nor, u64 addr) { … } static int cypress_nor_octal_dtr_en(struct spi_nor *nor) { … } static int cypress_nor_set_single_spi_bits(struct spi_nor *nor, u64 addr) { … } static int cypress_nor_octal_dtr_dis(struct spi_nor *nor) { … } static int cypress_nor_quad_enable_volatile_reg(struct spi_nor *nor, u64 addr) { … } /** * cypress_nor_quad_enable_volatile() - enable Quad I/O mode in volatile * register. * @nor: pointer to a 'struct spi_nor' * * It is recommended to update volatile registers in the field application due * to a risk of the non-volatile registers corruption by power interrupt. This * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable * bit in the CFR1 non-volatile in advance (typically by a Flash programmer * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is * also set during Flash power-up. * * Return: 0 on success, -errno otherwise. */ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) { … } /** * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode * (3 or 4-byte) by querying status * register 1 (SR1). * @nor: pointer to a 'struct spi_nor' * @addr_mode: ponter to a buffer where we return the determined * address mode. * * This function tries to determine current address mode by comparing SR1 value * from RDSR1(no address), RDAR(3-byte address), and RDAR(4-byte address). * * Return: 0 on success, -errno otherwise. */ static int cypress_nor_determine_addr_mode_by_sr1(struct spi_nor *nor, u8 *addr_mode) { … } /** * cypress_nor_set_addr_mode_nbytes() - Set the number of address bytes mode of * current address mode. * @nor: pointer to a 'struct spi_nor' * * Determine current address mode by reading SR1 with different methods, then * query CFR2V[7] to confirm. If determination is failed, force enter to 4-byte * address mode. * * Return: 0 on success, -errno otherwise. */ static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor) { … } /** * cypress_nor_get_page_size() - Get flash page size configuration. * @nor: pointer to a 'struct spi_nor' * * The BFPT table advertises a 512B or 256B page size depending on part but the * page size is actually configurable (with the default being 256B). Read from * CFR3V[4] and set the correct size. * * Return: 0 on success, -errno otherwise. */ static int cypress_nor_get_page_size(struct spi_nor *nor) { … } static void cypress_nor_ecc_init(struct spi_nor *nor) { … } static int s25fs256t_post_bfpt_fixup(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { … } static int s25fs256t_post_sfdp_fixup(struct spi_nor *nor) { … } static int s25fs256t_late_init(struct spi_nor *nor) { … } static struct spi_nor_fixups s25fs256t_fixups = …; static int s25hx_t_post_bfpt_fixup(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { … } static int s25hx_t_post_sfdp_fixup(struct spi_nor *nor) { … } static int s25hx_t_late_init(struct spi_nor *nor) { … } static struct spi_nor_fixups s25hx_t_fixups = …; /** * cypress_nor_set_octal_dtr() - Enable or disable octal DTR on Cypress flashes. * @nor: pointer to a 'struct spi_nor' * @enable: whether to enable or disable Octal DTR * * This also sets the memory access latency cycles to 24 to allow the flash to * run at up to 200MHz. * * Return: 0 on success, -errno otherwise. */ static int cypress_nor_set_octal_dtr(struct spi_nor *nor, bool enable) { … } static int s28hx_t_post_sfdp_fixup(struct spi_nor *nor) { … } static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { … } static int s28hx_t_late_init(struct spi_nor *nor) { … } static const struct spi_nor_fixups s28hx_t_fixups = …; static int s25fs_s_nor_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { … } static const struct spi_nor_fixups s25fs_s_nor_fixups = …; static const struct flash_info spansion_nor_parts[] = …; /** * spansion_nor_sr_ready_and_clear() - Query the Status Register to see if the * flash is ready for new commands and clear it if there are any errors. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor) { … } static int spansion_nor_late_init(struct spi_nor *nor) { … } static const struct spi_nor_fixups spansion_nor_fixups = …; const struct spi_nor_manufacturer spi_nor_spansion = …;
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