/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* * include/linux/spi/spidev.h * * Copyright (C) 2006 SWAPP * Andrea Paterniani <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef SPIDEV_H #define SPIDEV_H #include <linux/types.h> #include <linux/ioctl.h> #include <linux/spi/spi.h> /* IOCTL commands */ #define SPI_IOC_MAGIC … /** * struct spi_ioc_transfer - describes a single SPI transfer * @tx_buf: Holds pointer to userspace buffer with transmit data, or null. * If no data is provided, zeroes are shifted out. * @rx_buf: Holds pointer to userspace buffer for receive data, or null. * @len: Length of tx and rx buffers, in bytes. * @speed_hz: Temporary override of the device's bitrate. * @bits_per_word: Temporary override of the device's wordsize. * @delay_usecs: If nonzero, how long to delay after the last bit transfer * before optionally deselecting the device before the next transfer. * @cs_change: True to deselect device before starting the next transfer. * @word_delay_usecs: If nonzero, how long to wait between words within one * transfer. This property needs explicit support in the SPI controller, * otherwise it is silently ignored. * * This structure is mapped directly to the kernel spi_transfer structure; * the fields have the same meanings, except of course that the pointers * are in a different address space (and may be of different sizes in some * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel). * Zero-initialize the structure, including currently unused fields, to * accommodate potential future updates. * * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync(). * Pass it an array of related transfers, they'll execute together. * Each transfer may be half duplex (either direction) or full duplex. * * struct spi_ioc_transfer mesg[4]; * ... * status = ioctl(fd, SPI_IOC_MESSAGE(4), mesg); * * So for example one transfer might send a nine bit command (right aligned * in a 16-bit word), the next could read a block of 8-bit data before * terminating that command by temporarily deselecting the chip; the next * could send a different nine bit command (re-selecting the chip), and the * last transfer might write some register values. */ struct spi_ioc_transfer { … }; /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */ #define SPI_MSGSIZE(N) … #define SPI_IOC_MESSAGE(N) … /* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) (limited to 8 bits) */ #define SPI_IOC_RD_MODE … #define SPI_IOC_WR_MODE … /* Read / Write SPI bit justification */ #define SPI_IOC_RD_LSB_FIRST … #define SPI_IOC_WR_LSB_FIRST … /* Read / Write SPI device word length (1..N) */ #define SPI_IOC_RD_BITS_PER_WORD … #define SPI_IOC_WR_BITS_PER_WORD … /* Read / Write SPI device default max speed hz */ #define SPI_IOC_RD_MAX_SPEED_HZ … #define SPI_IOC_WR_MAX_SPEED_HZ … /* Read / Write of the SPI mode field */ #define SPI_IOC_RD_MODE32 … #define SPI_IOC_WR_MODE32 … #endif /* SPIDEV_H */