linux/drivers/spi/spi-armada-3700.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Marvell Armada-3700 SPI controller driver
 *
 * Copyright (C) 2016 Marvell Ltd.
 *
 * Author: Wilson Ding <[email protected]>
 * Author: Romain Perier <[email protected]>
 */

#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/spi/spi.h>

#define DRIVER_NAME

#define A3700_SPI_MAX_SPEED_HZ
#define A3700_SPI_MAX_PRESCALE
#define A3700_SPI_TIMEOUT

/* SPI Register Offest */
#define A3700_SPI_IF_CTRL_REG
#define A3700_SPI_IF_CFG_REG
#define A3700_SPI_DATA_OUT_REG
#define A3700_SPI_DATA_IN_REG
#define A3700_SPI_IF_INST_REG
#define A3700_SPI_IF_ADDR_REG
#define A3700_SPI_IF_RMODE_REG
#define A3700_SPI_IF_HDR_CNT_REG
#define A3700_SPI_IF_DIN_CNT_REG
#define A3700_SPI_IF_TIME_REG
#define A3700_SPI_INT_STAT_REG
#define A3700_SPI_INT_MASK_REG

/* A3700_SPI_IF_CTRL_REG */
#define A3700_SPI_EN
#define A3700_SPI_ADDR_NOT_CONFIG
#define A3700_SPI_WFIFO_OVERFLOW
#define A3700_SPI_WFIFO_UNDERFLOW
#define A3700_SPI_RFIFO_OVERFLOW
#define A3700_SPI_RFIFO_UNDERFLOW
#define A3700_SPI_WFIFO_FULL
#define A3700_SPI_WFIFO_EMPTY
#define A3700_SPI_RFIFO_FULL
#define A3700_SPI_RFIFO_EMPTY
#define A3700_SPI_WFIFO_RDY
#define A3700_SPI_RFIFO_RDY
#define A3700_SPI_XFER_RDY
#define A3700_SPI_XFER_DONE

/* A3700_SPI_IF_CFG_REG */
#define A3700_SPI_WFIFO_THRS
#define A3700_SPI_RFIFO_THRS
#define A3700_SPI_AUTO_CS
#define A3700_SPI_DMA_RD_EN
#define A3700_SPI_FIFO_MODE
#define A3700_SPI_SRST
#define A3700_SPI_XFER_START
#define A3700_SPI_XFER_STOP
#define A3700_SPI_INST_PIN
#define A3700_SPI_ADDR_PIN
#define A3700_SPI_DATA_PIN1
#define A3700_SPI_DATA_PIN0
#define A3700_SPI_FIFO_FLUSH
#define A3700_SPI_RW_EN
#define A3700_SPI_CLK_POL
#define A3700_SPI_CLK_PHA
#define A3700_SPI_BYTE_LEN
#define A3700_SPI_CLK_PRESCALE
#define A3700_SPI_CLK_PRESCALE_MASK
#define A3700_SPI_CLK_EVEN_OFFS

#define A3700_SPI_WFIFO_THRS_BIT
#define A3700_SPI_RFIFO_THRS_BIT
#define A3700_SPI_FIFO_THRS_MASK

#define A3700_SPI_DATA_PIN_MASK

/* A3700_SPI_IF_HDR_CNT_REG */
#define A3700_SPI_DUMMY_CNT_BIT
#define A3700_SPI_DUMMY_CNT_MASK
#define A3700_SPI_RMODE_CNT_BIT
#define A3700_SPI_RMODE_CNT_MASK
#define A3700_SPI_ADDR_CNT_BIT
#define A3700_SPI_ADDR_CNT_MASK
#define A3700_SPI_INSTR_CNT_BIT
#define A3700_SPI_INSTR_CNT_MASK

/* A3700_SPI_IF_TIME_REG */
#define A3700_SPI_CLK_CAPT_EDGE

struct a3700_spi {};

static u32 spireg_read(struct a3700_spi *a3700_spi, u32 offset)
{}

static void spireg_write(struct a3700_spi *a3700_spi, u32 offset, u32 data)
{}

static void a3700_spi_auto_cs_unset(struct a3700_spi *a3700_spi)
{}

static void a3700_spi_activate_cs(struct a3700_spi *a3700_spi, unsigned int cs)
{}

static void a3700_spi_deactivate_cs(struct a3700_spi *a3700_spi,
				    unsigned int cs)
{}

static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
				  unsigned int pin_mode, bool receiving)
{}

static void a3700_spi_fifo_mode_set(struct a3700_spi *a3700_spi, bool enable)
{}

static void a3700_spi_mode_set(struct a3700_spi *a3700_spi,
			       unsigned int mode_bits)
{}

static void a3700_spi_clock_set(struct a3700_spi *a3700_spi,
				unsigned int speed_hz)
{}

static void a3700_spi_bytelen_set(struct a3700_spi *a3700_spi, unsigned int len)
{}

static int a3700_spi_fifo_flush(struct a3700_spi *a3700_spi)
{}

static void a3700_spi_init(struct a3700_spi *a3700_spi)
{}

static irqreturn_t a3700_spi_interrupt(int irq, void *dev_id)
{}

static bool a3700_spi_wait_completion(struct spi_device *spi)
{}

static bool a3700_spi_transfer_wait(struct spi_device *spi,
				    unsigned int bit_mask)
{}

static void a3700_spi_fifo_thres_set(struct a3700_spi *a3700_spi,
				     unsigned int bytes)
{}

static void a3700_spi_transfer_setup(struct spi_device *spi,
				     struct spi_transfer *xfer)
{}

static void a3700_spi_set_cs(struct spi_device *spi, bool enable)
{}

static void a3700_spi_header_set(struct a3700_spi *a3700_spi)
{}

static int a3700_is_wfifo_full(struct a3700_spi *a3700_spi)
{}

static int a3700_spi_fifo_write(struct a3700_spi *a3700_spi)
{}

static int a3700_is_rfifo_empty(struct a3700_spi *a3700_spi)
{}

static int a3700_spi_fifo_read(struct a3700_spi *a3700_spi)
{}

static void a3700_spi_transfer_abort_fifo(struct a3700_spi *a3700_spi)
{}

static int a3700_spi_prepare_message(struct spi_controller *host,
				     struct spi_message *message)
{}

static int a3700_spi_transfer_one_fifo(struct spi_controller *host,
				  struct spi_device *spi,
				  struct spi_transfer *xfer)
{}

static int a3700_spi_transfer_one_full_duplex(struct spi_controller *host,
				  struct spi_device *spi,
				  struct spi_transfer *xfer)
{}

static int a3700_spi_transfer_one(struct spi_controller *host,
				  struct spi_device *spi,
				  struct spi_transfer *xfer)
{}

static int a3700_spi_unprepare_message(struct spi_controller *host,
				       struct spi_message *message)
{}

static const struct of_device_id a3700_spi_dt_ids[] =;

MODULE_DEVICE_TABLE(of, a3700_spi_dt_ids);

static int a3700_spi_probe(struct platform_device *pdev)
{}

static struct platform_driver a3700_spi_driver =;

module_platform_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();
MODULE_ALIAS();