// SPDX-License-Identifier: GPL-2.0+ // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. // Copyright (C) 2008 Juergen Beisert #include <linux/bits.h> #include <linux/clk.h> #include <linux/completion.h> #include <linux/delay.h> #include <linux/dmaengine.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/slab.h> #include <linux/spi/spi.h> #include <linux/types.h> #include <linux/of.h> #include <linux/property.h> #include <linux/dma/imx-dma.h> #define DRIVER_NAME … static bool use_dma = …; module_param(use_dma, bool, 0644); MODULE_PARM_DESC(…) …; /* define polling limits */ static unsigned int polling_limit_us = …; module_param(polling_limit_us, uint, 0664); MODULE_PARM_DESC(…) …; #define MXC_RPM_TIMEOUT … #define MXC_CSPIRXDATA … #define MXC_CSPITXDATA … #define MXC_CSPICTRL … #define MXC_CSPIINT … #define MXC_RESET … /* generic defines to abstract from the different register layouts */ #define MXC_INT_RR … #define MXC_INT_TE … #define MXC_INT_RDR … /* The maximum bytes that a sdma BD can transfer. */ #define MAX_SDMA_BD_BYTES … #define MX51_ECSPI_CTRL_MAX_BURST … /* The maximum bytes that IMX53_ECSPI can transfer in target mode.*/ #define MX53_MAX_TRANSFER_BYTES … enum spi_imx_devtype { … }; struct spi_imx_data; struct spi_imx_devtype_data { … }; struct spi_imx_data { … }; static inline int is_imx27_cspi(struct spi_imx_data *d) { … } static inline int is_imx35_cspi(struct spi_imx_data *d) { … } static inline int is_imx51_ecspi(struct spi_imx_data *d) { … } static inline int is_imx53_ecspi(struct spi_imx_data *d) { … } #define MXC_SPI_BUF_RX(type) … #define MXC_SPI_BUF_TX(type) … MXC_SPI_BUF_RX(…) MXC_SPI_BUF_TX(…) MXC_SPI_BUF_RX(…) MXC_SPI_BUF_TX(…) MXC_SPI_BUF_RX(…) MXC_SPI_BUF_TX(…) /* First entry is reserved, second entry is valid only if SDHC_SPIEN is set * (which is currently not the case in this driver) */ static int mxc_clkdivs[] = …; /* MX21, MX27 */ static unsigned int spi_imx_clkdiv_1(unsigned int fin, unsigned int fspi, unsigned int max, unsigned int *fres) { … } /* MX1, MX31, MX35, MX51 CSPI */ static unsigned int spi_imx_clkdiv_2(unsigned int fin, unsigned int fspi, unsigned int *fres) { … } static int spi_imx_bytes_per_word(const int bits_per_word) { … } static bool spi_imx_can_dma(struct spi_controller *controller, struct spi_device *spi, struct spi_transfer *transfer) { … } /* * Note the number of natively supported chip selects for MX51 is 4. Some * devices may have less actual SS pins but the register map supports 4. When * using gpio chip selects the cs values passed into the macros below can go * outside the range 0 - 3. We therefore need to limit the cs value to avoid * corrupting bits outside the allocated locations. * * The simplest way to do this is to just mask the cs bits to 2 bits. This * still allows all 4 native chip selects to work as well as gpio chip selects * (which can use any of the 4 chip select configurations). */ #define MX51_ECSPI_CTRL … #define MX51_ECSPI_CTRL_ENABLE … #define MX51_ECSPI_CTRL_XCH … #define MX51_ECSPI_CTRL_SMC … #define MX51_ECSPI_CTRL_MODE_MASK … #define MX51_ECSPI_CTRL_DRCTL(drctl) … #define MX51_ECSPI_CTRL_POSTDIV_OFFSET … #define MX51_ECSPI_CTRL_PREDIV_OFFSET … #define MX51_ECSPI_CTRL_CS(cs) … #define MX51_ECSPI_CTRL_BL_OFFSET … #define MX51_ECSPI_CTRL_BL_MASK … #define MX51_ECSPI_CONFIG … #define MX51_ECSPI_CONFIG_SCLKPHA(cs) … #define MX51_ECSPI_CONFIG_SCLKPOL(cs) … #define MX51_ECSPI_CONFIG_SBBCTRL(cs) … #define MX51_ECSPI_CONFIG_SSBPOL(cs) … #define MX51_ECSPI_CONFIG_DATACTL(cs) … #define MX51_ECSPI_CONFIG_SCLKCTL(cs) … #define MX51_ECSPI_INT … #define MX51_ECSPI_INT_TEEN … #define MX51_ECSPI_INT_RREN … #define MX51_ECSPI_INT_RDREN … #define MX51_ECSPI_DMA … #define MX51_ECSPI_DMA_TX_WML(wml) … #define MX51_ECSPI_DMA_RX_WML(wml) … #define MX51_ECSPI_DMA_RXT_WML(wml) … #define MX51_ECSPI_DMA_TEDEN … #define MX51_ECSPI_DMA_RXDEN … #define MX51_ECSPI_DMA_RXTDEN … #define MX51_ECSPI_STAT … #define MX51_ECSPI_STAT_RR … #define MX51_ECSPI_TESTREG … #define MX51_ECSPI_TESTREG_LBC … static void spi_imx_buf_rx_swap_u32(struct spi_imx_data *spi_imx) { … } static void spi_imx_buf_rx_swap(struct spi_imx_data *spi_imx) { … } static void spi_imx_buf_tx_swap_u32(struct spi_imx_data *spi_imx) { … } static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx) { … } static void mx53_ecspi_rx_target(struct spi_imx_data *spi_imx) { … } static void mx53_ecspi_tx_target(struct spi_imx_data *spi_imx) { … } /* MX51 eCSPI */ static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx, unsigned int fspi, unsigned int *fres) { … } static void mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable) { … } static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx) { … } static void mx51_ecspi_disable(struct spi_imx_data *spi_imx) { … } static int mx51_ecspi_channel(const struct spi_device *spi) { … } static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, struct spi_message *msg) { … } static void mx51_configure_cpha(struct spi_imx_data *spi_imx, struct spi_device *spi) { … } static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { … } static void mx51_setup_wml(struct spi_imx_data *spi_imx) { … } static int mx51_ecspi_rx_available(struct spi_imx_data *spi_imx) { … } static void mx51_ecspi_reset(struct spi_imx_data *spi_imx) { … } #define MX31_INTREG_TEEN … #define MX31_INTREG_RREN … #define MX31_CSPICTRL_ENABLE … #define MX31_CSPICTRL_HOST … #define MX31_CSPICTRL_XCH … #define MX31_CSPICTRL_SMC … #define MX31_CSPICTRL_POL … #define MX31_CSPICTRL_PHA … #define MX31_CSPICTRL_SSCTL … #define MX31_CSPICTRL_SSPOL … #define MX31_CSPICTRL_BC_SHIFT … #define MX35_CSPICTRL_BL_SHIFT … #define MX31_CSPICTRL_CS_SHIFT … #define MX35_CSPICTRL_CS_SHIFT … #define MX31_CSPICTRL_DR_SHIFT … #define MX31_CSPI_DMAREG … #define MX31_DMAREG_RH_DEN … #define MX31_DMAREG_TH_DEN … #define MX31_CSPISTATUS … #define MX31_STATUS_RR … #define MX31_CSPI_TESTREG … #define MX31_TEST_LBC … /* These functions also work for the i.MX35, but be aware that * the i.MX35 has a slightly different register layout for bits * we do not use here. */ static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable) { … } static void mx31_trigger(struct spi_imx_data *spi_imx) { … } static int mx31_prepare_message(struct spi_imx_data *spi_imx, struct spi_message *msg) { … } static int mx31_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { … } static int mx31_rx_available(struct spi_imx_data *spi_imx) { … } static void mx31_reset(struct spi_imx_data *spi_imx) { … } #define MX21_INTREG_RR … #define MX21_INTREG_TEEN … #define MX21_INTREG_RREN … #define MX21_CSPICTRL_POL … #define MX21_CSPICTRL_PHA … #define MX21_CSPICTRL_SSPOL … #define MX21_CSPICTRL_XCH … #define MX21_CSPICTRL_ENABLE … #define MX21_CSPICTRL_HOST … #define MX21_CSPICTRL_DR_SHIFT … #define MX21_CSPICTRL_CS_SHIFT … static void mx21_intctrl(struct spi_imx_data *spi_imx, int enable) { … } static void mx21_trigger(struct spi_imx_data *spi_imx) { … } static int mx21_prepare_message(struct spi_imx_data *spi_imx, struct spi_message *msg) { … } static int mx21_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { … } static int mx21_rx_available(struct spi_imx_data *spi_imx) { … } static void mx21_reset(struct spi_imx_data *spi_imx) { … } #define MX1_INTREG_RR … #define MX1_INTREG_TEEN … #define MX1_INTREG_RREN … #define MX1_CSPICTRL_POL … #define MX1_CSPICTRL_PHA … #define MX1_CSPICTRL_XCH … #define MX1_CSPICTRL_ENABLE … #define MX1_CSPICTRL_HOST … #define MX1_CSPICTRL_DR_SHIFT … static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) { … } static void mx1_trigger(struct spi_imx_data *spi_imx) { … } static int mx1_prepare_message(struct spi_imx_data *spi_imx, struct spi_message *msg) { … } static int mx1_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { … } static int mx1_rx_available(struct spi_imx_data *spi_imx) { … } static void mx1_reset(struct spi_imx_data *spi_imx) { … } static struct spi_imx_devtype_data imx1_cspi_devtype_data = …; static struct spi_imx_devtype_data imx21_cspi_devtype_data = …; static struct spi_imx_devtype_data imx27_cspi_devtype_data = …; static struct spi_imx_devtype_data imx31_cspi_devtype_data = …; static struct spi_imx_devtype_data imx35_cspi_devtype_data = …; static struct spi_imx_devtype_data imx51_ecspi_devtype_data = …; static struct spi_imx_devtype_data imx53_ecspi_devtype_data = …; static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = …; static const struct of_device_id spi_imx_dt_ids[] = …; MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); static void spi_imx_set_burst_len(struct spi_imx_data *spi_imx, int n_bits) { … } static void spi_imx_push(struct spi_imx_data *spi_imx) { … } static irqreturn_t spi_imx_isr(int irq, void *dev_id) { … } static int spi_imx_dma_configure(struct spi_controller *controller) { … } static int spi_imx_setupxfer(struct spi_device *spi, struct spi_transfer *t) { … } static void spi_imx_sdma_exit(struct spi_imx_data *spi_imx) { … } static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx, struct spi_controller *controller) { … } static void spi_imx_dma_rx_callback(void *cookie) { … } static void spi_imx_dma_tx_callback(void *cookie) { … } static int spi_imx_calculate_timeout(struct spi_imx_data *spi_imx, int size) { … } static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, struct spi_transfer *transfer) { … } static int spi_imx_pio_transfer(struct spi_device *spi, struct spi_transfer *transfer) { … } static int spi_imx_poll_transfer(struct spi_device *spi, struct spi_transfer *transfer) { … } static int spi_imx_pio_transfer_target(struct spi_device *spi, struct spi_transfer *transfer) { … } static int spi_imx_transfer_one(struct spi_controller *controller, struct spi_device *spi, struct spi_transfer *transfer) { … } static int spi_imx_setup(struct spi_device *spi) { … } static int spi_imx_prepare_message(struct spi_controller *controller, struct spi_message *msg) { … } static int spi_imx_unprepare_message(struct spi_controller *controller, struct spi_message *msg) { … } static int spi_imx_target_abort(struct spi_controller *controller) { … } static int spi_imx_probe(struct platform_device *pdev) { … } static void spi_imx_remove(struct platform_device *pdev) { … } static int spi_imx_runtime_resume(struct device *dev) { … } static int spi_imx_runtime_suspend(struct device *dev) { … } static int spi_imx_suspend(struct device *dev) { … } static int spi_imx_resume(struct device *dev) { … } static const struct dev_pm_ops imx_spi_pm = …; static struct platform_driver spi_imx_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …;
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