// SPDX-License-Identifier: GPL-2.0 // Copyright (C) 2022 Jonathan Neuschäfer #include <linux/clk.h> #include <linux/mfd/syscon.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/spi/spi-mem.h> #define FIU_CFG … #define FIU_BURST_BFG … #define FIU_RESP_CFG … #define FIU_CFBB_PROT … #define FIU_FWIN1_LOW … #define FIU_FWIN1_HIGH … #define FIU_FWIN2_LOW … #define FIU_FWIN2_HIGH … #define FIU_FWIN3_LOW … #define FIU_FWIN3_HIGH … #define FIU_PROT_LOCK … #define FIU_PROT_CLEAR … #define FIU_SPI_FL_CFG … #define FIU_UMA_CODE … #define FIU_UMA_AB0 … #define FIU_UMA_AB1 … #define FIU_UMA_AB2 … #define FIU_UMA_DB0 … #define FIU_UMA_DB1 … #define FIU_UMA_DB2 … #define FIU_UMA_DB3 … #define FIU_UMA_CTS … #define FIU_UMA_ECTS … #define FIU_BURST_CFG_R16 … #define FIU_UMA_CTS_D_SIZE(x) … #define FIU_UMA_CTS_A_SIZE … #define FIU_UMA_CTS_WR … #define FIU_UMA_CTS_CS(x) … #define FIU_UMA_CTS_EXEC_DONE … #define SHM_FLASH_SIZE … #define SHM_FLASH_SIZE_STALL_HOST … /* * I observed a typical wait time of 16 iterations for a UMA transfer to * finish, so this should be a safe limit. */ #define UMA_WAIT_ITERATIONS … /* The memory-mapped view of flash is 16 MiB long */ #define MAX_MEMORY_SIZE_PER_CS … #define MAX_MEMORY_SIZE_TOTAL … struct wpcm_fiu_spi { … }; static void wpcm_fiu_set_opcode(struct wpcm_fiu_spi *fiu, u8 opcode) { … } static void wpcm_fiu_set_addr(struct wpcm_fiu_spi *fiu, u32 addr) { … } static void wpcm_fiu_set_data(struct wpcm_fiu_spi *fiu, const u8 *data, unsigned int nbytes) { … } static void wpcm_fiu_get_data(struct wpcm_fiu_spi *fiu, u8 *data, unsigned int nbytes) { … } /* * Perform a UMA (User Mode Access) operation, i.e. a software-controlled SPI transfer. */ static int wpcm_fiu_do_uma(struct wpcm_fiu_spi *fiu, unsigned int cs, bool use_addr, bool write, int data_bytes) { … } static void wpcm_fiu_ects_assert(struct wpcm_fiu_spi *fiu, unsigned int cs) { … } static void wpcm_fiu_ects_deassert(struct wpcm_fiu_spi *fiu, unsigned int cs) { … } struct wpcm_fiu_op_shape { … }; static bool wpcm_fiu_normal_match(const struct spi_mem_op *op) { … } static int wpcm_fiu_normal_exec(struct spi_mem *mem, const struct spi_mem_op *op) { … } static bool wpcm_fiu_fast_read_match(const struct spi_mem_op *op) { … } static int wpcm_fiu_fast_read_exec(struct spi_mem *mem, const struct spi_mem_op *op) { … } /* * 4-byte addressing. * * Flash view: [ C A A A A D D D D] * bytes: 13 aa bb cc dd -> 5a a5 f0 0f * FIU's view: [ C A A A][ C D D D D] * FIU mode: [ read/write][ read ] */ static bool wpcm_fiu_4ba_match(const struct spi_mem_op *op) { … } static int wpcm_fiu_4ba_exec(struct spi_mem *mem, const struct spi_mem_op *op) { … } /* * RDID (Read Identification) needs special handling because Linux expects to * be able to read 6 ID bytes and FIU can only read up to 4 at once. * * We're lucky in this case, because executing the RDID instruction twice will * result in the same result. * * What we do is as follows (C: write command/opcode byte, D: read data byte, * A: write address byte): * * 1. C D D D * 2. C A A A D D D */ static bool wpcm_fiu_rdid_match(const struct spi_mem_op *op) { … } static int wpcm_fiu_rdid_exec(struct spi_mem *mem, const struct spi_mem_op *op) { … } /* * With some dummy bytes. * * C A A A X* X D D D D * [C A A A D*][C D D D D] */ static bool wpcm_fiu_dummy_match(const struct spi_mem_op *op) { … } static int wpcm_fiu_dummy_exec(struct spi_mem *mem, const struct spi_mem_op *op) { … } static const struct wpcm_fiu_op_shape wpcm_fiu_op_shapes[] = …; static const struct wpcm_fiu_op_shape *wpcm_fiu_find_op_shape(const struct spi_mem_op *op) { … } static bool wpcm_fiu_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { … } /* * In order to ensure the integrity of SPI transfers performed via UMA, * temporarily disable (stall) memory accesses coming from the host CPU. */ static void wpcm_fiu_stall_host(struct wpcm_fiu_spi *fiu, bool stall) { … } static int wpcm_fiu_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { … } static int wpcm_fiu_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) { … } static int wpcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) { … } static ssize_t wpcm_fiu_direct_read(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, void *buf) { … } static const struct spi_controller_mem_ops wpcm_fiu_mem_ops = …; static void wpcm_fiu_hw_init(struct wpcm_fiu_spi *fiu) { … } static int wpcm_fiu_probe(struct platform_device *pdev) { … } static const struct of_device_id wpcm_fiu_dt_ids[] = …; MODULE_DEVICE_TABLE(of, wpcm_fiu_dt_ids); static struct platform_driver wpcm_fiu_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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