#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/omap-dma.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/pinctrl/consumer.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/sizes.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
struct ti_qspi_regs { … };
struct ti_qspi { … };
#define QSPI_PID …
#define QSPI_SYSCONFIG …
#define QSPI_SPI_CLOCK_CNTRL_REG …
#define QSPI_SPI_DC_REG …
#define QSPI_SPI_CMD_REG …
#define QSPI_SPI_STATUS_REG …
#define QSPI_SPI_DATA_REG …
#define QSPI_SPI_SETUP_REG(n) …
#define QSPI_SPI_SWITCH_REG …
#define QSPI_SPI_DATA_REG_1 …
#define QSPI_SPI_DATA_REG_2 …
#define QSPI_SPI_DATA_REG_3 …
#define QSPI_COMPLETION_TIMEOUT …
#define QSPI_CLK_EN …
#define QSPI_CLK_DIV_MAX …
#define QSPI_EN_CS(n) …
#define QSPI_WLEN(n) …
#define QSPI_3_PIN …
#define QSPI_RD_SNGL …
#define QSPI_WR_SNGL …
#define QSPI_RD_DUAL …
#define QSPI_RD_QUAD …
#define QSPI_INVAL …
#define QSPI_FLEN(n) …
#define QSPI_WLEN_MAX_BITS …
#define QSPI_WLEN_MAX_BYTES …
#define QSPI_WLEN_MASK …
#define BUSY …
#define WC …
#define QSPI_DD(m, n) …
#define QSPI_CKPHA(n) …
#define QSPI_CSPOL(n) …
#define QSPI_CKPOL(n) …
#define QSPI_FRAME …
#define QSPI_AUTOSUSPEND_TIMEOUT …
#define MEM_CS_EN(n) …
#define MEM_CS_MASK …
#define MM_SWITCH …
#define QSPI_SETUP_RD_NORMAL …
#define QSPI_SETUP_RD_DUAL …
#define QSPI_SETUP_RD_QUAD …
#define QSPI_SETUP_ADDR_SHIFT …
#define QSPI_SETUP_DUMMY_SHIFT …
#define QSPI_DMA_BUFFER_SIZE …
static inline unsigned long ti_qspi_read(struct ti_qspi *qspi,
unsigned long reg)
{ … }
static inline void ti_qspi_write(struct ti_qspi *qspi,
unsigned long val, unsigned long reg)
{ … }
static int ti_qspi_setup(struct spi_device *spi)
{ … }
static void ti_qspi_setup_clk(struct ti_qspi *qspi, u32 speed_hz)
{ … }
static void ti_qspi_restore_ctx(struct ti_qspi *qspi)
{ … }
static inline u32 qspi_is_busy(struct ti_qspi *qspi)
{ … }
static inline int ti_qspi_poll_wc(struct ti_qspi *qspi)
{ … }
static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t,
int count)
{ … }
static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t,
int count)
{ … }
static int qspi_transfer_msg(struct ti_qspi *qspi, struct spi_transfer *t,
int count)
{ … }
static void ti_qspi_dma_callback(void *param)
{ … }
static int ti_qspi_dma_xfer(struct ti_qspi *qspi, dma_addr_t dma_dst,
dma_addr_t dma_src, size_t len)
{ … }
static int ti_qspi_dma_bounce_buffer(struct ti_qspi *qspi, loff_t offs,
void *to, size_t readsize)
{ … }
static int ti_qspi_dma_xfer_sg(struct ti_qspi *qspi, struct sg_table rx_sg,
loff_t from)
{ … }
static void ti_qspi_enable_memory_map(struct spi_device *spi)
{ … }
static void ti_qspi_disable_memory_map(struct spi_device *spi)
{ … }
static void ti_qspi_setup_mmap_read(struct spi_device *spi, u8 opcode,
u8 data_nbits, u8 addr_width,
u8 dummy_bytes)
{ … }
static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
{ … }
static int ti_qspi_exec_mem_op(struct spi_mem *mem,
const struct spi_mem_op *op)
{ … }
static const struct spi_controller_mem_ops ti_qspi_mem_ops = …;
static int ti_qspi_start_transfer_one(struct spi_controller *host,
struct spi_message *m)
{ … }
static int ti_qspi_runtime_resume(struct device *dev)
{ … }
static void ti_qspi_dma_cleanup(struct ti_qspi *qspi)
{ … }
static const struct of_device_id ti_qspi_match[] = …;
MODULE_DEVICE_TABLE(of, ti_qspi_match);
static int ti_qspi_probe(struct platform_device *pdev)
{ … }
static void ti_qspi_remove(struct platform_device *pdev)
{ … }
static const struct dev_pm_ops ti_qspi_pm_ops = …;
static struct platform_driver ti_qspi_driver = …;
module_platform_driver(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_ALIAS(…) …;