// SPDX-License-Identifier: GPL-2.0-or-later /* * OMAP2 McSPI controller driver * * Copyright (C) 2005, 2006 Nokia Corporation * Author: Samuel Ortiz <[email protected]> and * Juha Yrjola <[email protected]> */ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/device.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/slab.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/gcd.h> #include <linux/spi/spi.h> #include "internals.h" #include <linux/platform_data/spi-omap2-mcspi.h> #define OMAP2_MCSPI_MAX_FREQ … #define OMAP2_MCSPI_MAX_DIVIDER … #define OMAP2_MCSPI_MAX_FIFODEPTH … #define OMAP2_MCSPI_MAX_FIFOWCNT … #define SPI_AUTOSUSPEND_TIMEOUT … #define OMAP2_MCSPI_REVISION … #define OMAP2_MCSPI_SYSSTATUS … #define OMAP2_MCSPI_IRQSTATUS … #define OMAP2_MCSPI_IRQENABLE … #define OMAP2_MCSPI_WAKEUPENABLE … #define OMAP2_MCSPI_SYST … #define OMAP2_MCSPI_MODULCTRL … #define OMAP2_MCSPI_XFERLEVEL … /* per-channel banks, 0x14 bytes each, first is: */ #define OMAP2_MCSPI_CHCONF0 … #define OMAP2_MCSPI_CHSTAT0 … #define OMAP2_MCSPI_CHCTRL0 … #define OMAP2_MCSPI_TX0 … #define OMAP2_MCSPI_RX0 … /* per-register bitmasks: */ #define OMAP2_MCSPI_IRQSTATUS_EOW … #define OMAP2_MCSPI_MODULCTRL_SINGLE … #define OMAP2_MCSPI_MODULCTRL_MS … #define OMAP2_MCSPI_MODULCTRL_STEST … #define OMAP2_MCSPI_CHCONF_PHA … #define OMAP2_MCSPI_CHCONF_POL … #define OMAP2_MCSPI_CHCONF_CLKD_MASK … #define OMAP2_MCSPI_CHCONF_EPOL … #define OMAP2_MCSPI_CHCONF_WL_MASK … #define OMAP2_MCSPI_CHCONF_TRM_RX_ONLY … #define OMAP2_MCSPI_CHCONF_TRM_TX_ONLY … #define OMAP2_MCSPI_CHCONF_TRM_MASK … #define OMAP2_MCSPI_CHCONF_DMAW … #define OMAP2_MCSPI_CHCONF_DMAR … #define OMAP2_MCSPI_CHCONF_DPE0 … #define OMAP2_MCSPI_CHCONF_DPE1 … #define OMAP2_MCSPI_CHCONF_IS … #define OMAP2_MCSPI_CHCONF_TURBO … #define OMAP2_MCSPI_CHCONF_FORCE … #define OMAP2_MCSPI_CHCONF_FFET … #define OMAP2_MCSPI_CHCONF_FFER … #define OMAP2_MCSPI_CHCONF_CLKG … #define OMAP2_MCSPI_CHSTAT_RXS … #define OMAP2_MCSPI_CHSTAT_TXS … #define OMAP2_MCSPI_CHSTAT_EOT … #define OMAP2_MCSPI_CHSTAT_TXFFE … #define OMAP2_MCSPI_CHCTRL_EN … #define OMAP2_MCSPI_CHCTRL_EXTCLK_MASK … #define OMAP2_MCSPI_WAKEUPENABLE_WKEN … /* We have 2 DMA channels per CS, one for RX and one for TX */ struct omap2_mcspi_dma { … }; /* use PIO for small transfers, avoiding DMA setup/teardown overhead and * cache operations; better heuristics consider wordsize and bitrate. */ #define DMA_MIN_BYTES … /* * Used for context save and restore, structure members to be updated whenever * corresponding registers are modified. */ struct omap2_mcspi_regs { … }; struct omap2_mcspi { … }; struct omap2_mcspi_cs { … }; static inline void mcspi_write_reg(struct spi_controller *ctlr, int idx, u32 val) { … } static inline u32 mcspi_read_reg(struct spi_controller *ctlr, int idx) { … } static inline void mcspi_write_cs_reg(const struct spi_device *spi, int idx, u32 val) { … } static inline u32 mcspi_read_cs_reg(const struct spi_device *spi, int idx) { … } static inline u32 mcspi_cached_chconf0(const struct spi_device *spi) { … } static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) { … } static inline int mcspi_bytes_per_word(int word_len) { … } static void omap2_mcspi_set_dma_req(const struct spi_device *spi, int is_read, int enable) { … } static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable) { … } static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) { … } static void omap2_mcspi_set_mode(struct spi_controller *ctlr) { … } static void omap2_mcspi_set_fifo(const struct spi_device *spi, struct spi_transfer *t, int enable) { … } static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) { … } static int mcspi_wait_for_completion(struct omap2_mcspi *mcspi, struct completion *x) { … } static void omap2_mcspi_rx_callback(void *data) { … } static void omap2_mcspi_tx_callback(void *data) { … } static void omap2_mcspi_tx_dma(struct spi_device *spi, struct spi_transfer *xfer, struct dma_slave_config cfg) { … } static unsigned omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, struct dma_slave_config cfg, unsigned es) { … } static unsigned omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) { … } static unsigned omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer) { … } static u32 omap2_mcspi_calc_divisor(u32 speed_hz, u32 ref_clk_hz) { … } /* called only when no transfer is active to this device */ static int omap2_mcspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { … } /* * Note that we currently allow DMA only if we get a channel * for both rx and tx. Otherwise we'll do PIO for both rx and tx. */ static int omap2_mcspi_request_dma(struct omap2_mcspi *mcspi, struct omap2_mcspi_dma *mcspi_dma) { … } static void omap2_mcspi_release_dma(struct spi_controller *ctlr) { … } static void omap2_mcspi_cleanup(struct spi_device *spi) { … } static int omap2_mcspi_setup(struct spi_device *spi) { … } static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) { … } static int omap2_mcspi_target_abort(struct spi_controller *ctlr) { … } static int omap2_mcspi_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *t) { … } static int omap2_mcspi_prepare_message(struct spi_controller *ctlr, struct spi_message *msg) { … } static bool omap2_mcspi_can_dma(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { … } static size_t omap2_mcspi_max_xfer_size(struct spi_device *spi) { … } static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) { … } static int omap_mcspi_runtime_suspend(struct device *dev) { … } /* * When SPI wake up from off-mode, CS is in activate state. If it was in * inactive state when driver was suspend, then force it to inactive state at * wake up. */ static int omap_mcspi_runtime_resume(struct device *dev) { … } static struct omap2_mcspi_platform_config omap2_pdata = …; static struct omap2_mcspi_platform_config omap4_pdata = …; static struct omap2_mcspi_platform_config am654_pdata = …; static const struct of_device_id omap_mcspi_of_match[] = …; MODULE_DEVICE_TABLE(of, omap_mcspi_of_match); static int omap2_mcspi_probe(struct platform_device *pdev) { … } static void omap2_mcspi_remove(struct platform_device *pdev) { … } /* work with hotplug and coldplug */ MODULE_ALIAS(…) …; static int __maybe_unused omap2_mcspi_suspend(struct device *dev) { … } static int __maybe_unused omap2_mcspi_resume(struct device *dev) { … } static const struct dev_pm_ops omap2_mcspi_pm_ops = …; static struct platform_driver omap2_mcspi_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux