#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/gpio/consumer.h>
#include <linux/highmem.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
struct pic32_spi_regs { … };
#define CTRL_RX_INT_SHIFT …
#define RX_FIFO_EMPTY …
#define RX_FIFO_NOT_EMPTY …
#define RX_FIFO_HALF_FULL …
#define RX_FIFO_FULL …
#define CTRL_TX_INT_SHIFT …
#define TX_FIFO_ALL_EMPTY …
#define TX_FIFO_EMPTY …
#define TX_FIFO_HALF_EMPTY …
#define TX_FIFO_NOT_FULL …
#define CTRL_MSTEN …
#define CTRL_CKP …
#define CTRL_CKE …
#define CTRL_SMP …
#define CTRL_BPW_MASK …
#define CTRL_BPW_SHIFT …
#define PIC32_BPW_8 …
#define PIC32_BPW_16 …
#define PIC32_BPW_32 …
#define CTRL_SIDL …
#define CTRL_ON …
#define CTRL_ENHBUF …
#define CTRL_MCLKSEL …
#define CTRL_MSSEN …
#define CTRL_FRMEN …
#define STAT_RF_EMPTY …
#define STAT_RX_OV …
#define STAT_TX_UR …
#define STAT_FRM_ERR …
#define STAT_TF_LVL_MASK …
#define STAT_TF_LVL_SHIFT …
#define STAT_RF_LVL_MASK …
#define STAT_RF_LVL_SHIFT …
#define BAUD_MASK …
#define CTRL2_TX_UR_EN …
#define CTRL2_RX_OV_EN …
#define CTRL2_FRM_ERR_EN …
#define PIC32_DMA_LEN_MIN …
struct pic32_spi { … };
static inline void pic32_spi_enable(struct pic32_spi *pic32s)
{ … }
static inline void pic32_spi_disable(struct pic32_spi *pic32s)
{ … }
static void pic32_spi_set_clk_rate(struct pic32_spi *pic32s, u32 spi_ck)
{ … }
static inline u32 pic32_rx_fifo_level(struct pic32_spi *pic32s)
{ … }
static inline u32 pic32_tx_fifo_level(struct pic32_spi *pic32s)
{ … }
static u32 pic32_tx_max(struct pic32_spi *pic32s, int n_bytes)
{ … }
static u32 pic32_rx_max(struct pic32_spi *pic32s, int n_bytes)
{ … }
#define BUILD_SPI_FIFO_RW(__name, __type, __bwl) …
BUILD_SPI_FIFO_RW(byte, u8, b);
BUILD_SPI_FIFO_RW(word, u16, w);
BUILD_SPI_FIFO_RW(dword, u32, l);
static void pic32_err_stop(struct pic32_spi *pic32s, const char *msg)
{ … }
static irqreturn_t pic32_spi_fault_irq(int irq, void *dev_id)
{ … }
static irqreturn_t pic32_spi_rx_irq(int irq, void *dev_id)
{ … }
static irqreturn_t pic32_spi_tx_irq(int irq, void *dev_id)
{ … }
static void pic32_spi_dma_rx_notify(void *data)
{ … }
static int pic32_spi_dma_transfer(struct pic32_spi *pic32s,
struct spi_transfer *xfer)
{ … }
static int pic32_spi_dma_config(struct pic32_spi *pic32s, u32 dma_width)
{ … }
static int pic32_spi_set_word_size(struct pic32_spi *pic32s, u8 bits_per_word)
{ … }
static int pic32_spi_prepare_hardware(struct spi_controller *host)
{ … }
static int pic32_spi_prepare_message(struct spi_controller *host,
struct spi_message *msg)
{ … }
static bool pic32_spi_can_dma(struct spi_controller *host,
struct spi_device *spi,
struct spi_transfer *xfer)
{ … }
static int pic32_spi_one_transfer(struct spi_controller *host,
struct spi_device *spi,
struct spi_transfer *transfer)
{ … }
static int pic32_spi_unprepare_message(struct spi_controller *host,
struct spi_message *msg)
{ … }
static int pic32_spi_unprepare_hardware(struct spi_controller *host)
{ … }
static int pic32_spi_setup(struct spi_device *spi)
{ … }
static void pic32_spi_cleanup(struct spi_device *spi)
{ … }
static int pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev)
{ … }
static void pic32_spi_dma_unprep(struct pic32_spi *pic32s)
{ … }
static void pic32_spi_hw_init(struct pic32_spi *pic32s)
{ … }
static int pic32_spi_hw_probe(struct platform_device *pdev,
struct pic32_spi *pic32s)
{ … }
static int pic32_spi_probe(struct platform_device *pdev)
{ … }
static void pic32_spi_remove(struct platform_device *pdev)
{ … }
static const struct of_device_id pic32_spi_of_match[] = …;
MODULE_DEVICE_TABLE(of, pic32_spi_of_match);
static struct platform_driver pic32_spi_driver = …;
module_platform_driver(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;