/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020, Linaro Limited */ #ifndef QCOM_GPI_DMA_H #define QCOM_GPI_DMA_H /** * enum spi_transfer_cmd - spi transfer commands */ enum spi_transfer_cmd { … }; /** * struct gpi_spi_config - spi config for peripheral * * @loopback_en: spi loopback enable when set * @clock_pol_high: clock polarity * @data_pol_high: data polarity * @pack_en: process tx/rx buffers as packed * @word_len: spi word length * @clk_div: source clock divider * @clk_src: serial clock * @cmd: spi cmd * @fragmentation: keep CS asserted at end of sequence * @cs: chip select toggle * @set_config: set peripheral config * @rx_len: receive length for buffer */ struct gpi_spi_config { … }; enum i2c_op { … }; /** * struct gpi_i2c_config - i2c config for peripheral * * @pack_enable: process tx/rx buffers as packed * @cycle_count: clock cycles to be sent * @high_count: high period of clock * @low_count: low period of clock * @clk_div: source clock divider * @addr: i2c bus address * @stretch: stretch the clock at eot * @set_config: set peripheral config * @rx_len: receive length for buffer * @op: i2c cmd * @muli-msg: is part of multi i2c r-w msgs */ struct gpi_i2c_config { … }; #endif /* QCOM_GPI_DMA_H */