#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/err.h>
#include <linux/interconnect.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_opp.h>
#include <linux/pm_runtime.h>
#include <linux/spi/spi.h>
#include "internals.h"
#define QUP_CONFIG …
#define QUP_STATE …
#define QUP_IO_M_MODES …
#define QUP_SW_RESET …
#define QUP_OPERATIONAL …
#define QUP_ERROR_FLAGS …
#define QUP_ERROR_FLAGS_EN …
#define QUP_OPERATIONAL_MASK …
#define QUP_HW_VERSION …
#define QUP_MX_OUTPUT_CNT …
#define QUP_OUTPUT_FIFO …
#define QUP_MX_WRITE_CNT …
#define QUP_MX_INPUT_CNT …
#define QUP_MX_READ_CNT …
#define QUP_INPUT_FIFO …
#define SPI_CONFIG …
#define SPI_IO_CONTROL …
#define SPI_ERROR_FLAGS …
#define SPI_ERROR_FLAGS_EN …
#define QUP_CONFIG_SPI_MODE …
#define QUP_CONFIG_CLOCK_AUTO_GATE …
#define QUP_CONFIG_NO_INPUT …
#define QUP_CONFIG_NO_OUTPUT …
#define QUP_CONFIG_N …
#define QUP_STATE_VALID …
#define QUP_STATE_RESET …
#define QUP_STATE_RUN …
#define QUP_STATE_PAUSE …
#define QUP_STATE_MASK …
#define QUP_STATE_CLEAR …
#define QUP_HW_VERSION_2_1_1 …
#define QUP_IO_M_PACK_EN …
#define QUP_IO_M_UNPACK_EN …
#define QUP_IO_M_INPUT_MODE_MASK_SHIFT …
#define QUP_IO_M_OUTPUT_MODE_MASK_SHIFT …
#define QUP_IO_M_INPUT_MODE_MASK …
#define QUP_IO_M_OUTPUT_MODE_MASK …
#define QUP_IO_M_OUTPUT_BLOCK_SIZE(x) …
#define QUP_IO_M_OUTPUT_FIFO_SIZE(x) …
#define QUP_IO_M_INPUT_BLOCK_SIZE(x) …
#define QUP_IO_M_INPUT_FIFO_SIZE(x) …
#define QUP_IO_M_MODE_FIFO …
#define QUP_IO_M_MODE_BLOCK …
#define QUP_IO_M_MODE_DMOV …
#define QUP_IO_M_MODE_BAM …
#define QUP_OP_IN_BLOCK_READ_REQ …
#define QUP_OP_OUT_BLOCK_WRITE_REQ …
#define QUP_OP_MAX_INPUT_DONE_FLAG …
#define QUP_OP_MAX_OUTPUT_DONE_FLAG …
#define QUP_OP_IN_SERVICE_FLAG …
#define QUP_OP_OUT_SERVICE_FLAG …
#define QUP_OP_IN_FIFO_FULL …
#define QUP_OP_OUT_FIFO_FULL …
#define QUP_OP_IN_FIFO_NOT_EMPTY …
#define QUP_OP_OUT_FIFO_NOT_EMPTY …
#define QUP_ERROR_OUTPUT_OVER_RUN …
#define QUP_ERROR_INPUT_UNDER_RUN …
#define QUP_ERROR_OUTPUT_UNDER_RUN …
#define QUP_ERROR_INPUT_OVER_RUN …
#define SPI_CONFIG_HS_MODE …
#define SPI_CONFIG_INPUT_FIRST …
#define SPI_CONFIG_LOOPBACK …
#define SPI_IO_C_FORCE_CS …
#define SPI_IO_C_CLK_IDLE_HIGH …
#define SPI_IO_C_MX_CS_MODE …
#define SPI_IO_C_CS_N_POLARITY_0 …
#define SPI_IO_C_CS_SELECT(x) …
#define SPI_IO_C_CS_SELECT_MASK …
#define SPI_IO_C_TRISTATE_CS …
#define SPI_IO_C_NO_TRI_STATE …
#define SPI_ERROR_CLK_OVER_RUN …
#define SPI_ERROR_CLK_UNDER_RUN …
#define SPI_NUM_CHIPSELECTS …
#define SPI_MAX_XFER …
#define SPI_HS_MIN_RATE …
#define SPI_MAX_RATE …
#define SPI_DELAY_THRESHOLD …
#define SPI_DELAY_RETRY …
#define SPI_BUS_WIDTH …
struct spi_qup { … };
static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer);
static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag)
{ … }
static inline bool spi_qup_is_dma_xfer(int mode)
{ … }
static inline unsigned int spi_qup_len(struct spi_qup *controller)
{ … }
static inline bool spi_qup_is_valid_state(struct spi_qup *controller)
{ … }
static int spi_qup_vote_bw(struct spi_qup *controller, u32 speed_hz)
{ … }
static int spi_qup_set_state(struct spi_qup *controller, u32 state)
{ … }
static void spi_qup_read_from_fifo(struct spi_qup *controller, u32 num_words)
{ … }
static void spi_qup_read(struct spi_qup *controller, u32 *opflags)
{ … }
static void spi_qup_write_to_fifo(struct spi_qup *controller, u32 num_words)
{ … }
static void spi_qup_dma_done(void *data)
{ … }
static void spi_qup_write(struct spi_qup *controller)
{ … }
static int spi_qup_prep_sg(struct spi_controller *host, struct scatterlist *sgl,
unsigned int nents, enum dma_transfer_direction dir,
dma_async_tx_callback callback)
{ … }
static void spi_qup_dma_terminate(struct spi_controller *host,
struct spi_transfer *xfer)
{ … }
static u32 spi_qup_sgl_get_nents_len(struct scatterlist *sgl, u32 max,
u32 *nents)
{ … }
static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer,
unsigned long timeout)
{ … }
static int spi_qup_do_pio(struct spi_device *spi, struct spi_transfer *xfer,
unsigned long timeout)
{ … }
static bool spi_qup_data_pending(struct spi_qup *controller)
{ … }
static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
{ … }
static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer)
{ … }
static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
{ … }
static int spi_qup_transfer_one(struct spi_controller *host,
struct spi_device *spi,
struct spi_transfer *xfer)
{ … }
static bool spi_qup_can_dma(struct spi_controller *host, struct spi_device *spi,
struct spi_transfer *xfer)
{ … }
static void spi_qup_release_dma(struct spi_controller *host)
{ … }
static int spi_qup_init_dma(struct spi_controller *host, resource_size_t base)
{ … }
static void spi_qup_set_cs(struct spi_device *spi, bool val)
{ … }
static int spi_qup_probe(struct platform_device *pdev)
{ … }
#ifdef CONFIG_PM
static int spi_qup_pm_suspend_runtime(struct device *device)
{ … }
static int spi_qup_pm_resume_runtime(struct device *device)
{ … }
#endif
#ifdef CONFIG_PM_SLEEP
static int spi_qup_suspend(struct device *device)
{ … }
static int spi_qup_resume(struct device *device)
{ … }
#endif
static void spi_qup_remove(struct platform_device *pdev)
{ … }
static const struct of_device_id spi_qup_dt_match[] = …;
MODULE_DEVICE_TABLE(of, spi_qup_dt_match);
static const struct dev_pm_ops spi_qup_dev_pm_ops = …;
static struct platform_driver spi_qup_driver = …;
module_platform_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_ALIAS(…) …;