// SPDX-License-Identifier: GPL-2.0+ // // Copyright (c) 2009 Samsung Electronics Co., Ltd. // Jaswinder Singh <[email protected]> #include <linux/bitops.h> #include <linux/bits.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_data/spi-s3c64xx.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/spi/spi.h> #include <linux/types.h> #define MAX_SPI_PORTS … #define S3C64XX_SPI_QUIRK_CS_AUTO … #define AUTOSUSPEND_TIMEOUT … /* Registers and bit-fields */ #define S3C64XX_SPI_CH_CFG … #define S3C64XX_SPI_CLK_CFG … #define S3C64XX_SPI_MODE_CFG … #define S3C64XX_SPI_CS_REG … #define S3C64XX_SPI_INT_EN … #define S3C64XX_SPI_STATUS … #define S3C64XX_SPI_TX_DATA … #define S3C64XX_SPI_RX_DATA … #define S3C64XX_SPI_PACKET_CNT … #define S3C64XX_SPI_PENDING_CLR … #define S3C64XX_SPI_SWAP_CFG … #define S3C64XX_SPI_FB_CLK … #define S3C64XX_SPI_CH_HS_EN … #define S3C64XX_SPI_CH_SW_RST … #define S3C64XX_SPI_CH_SLAVE … #define S3C64XX_SPI_CPOL_L … #define S3C64XX_SPI_CPHA_B … #define S3C64XX_SPI_CH_RXCH_ON … #define S3C64XX_SPI_CH_TXCH_ON … #define S3C64XX_SPI_CLKSEL_SRCMSK … #define S3C64XX_SPI_CLKSEL_SRCSHFT … #define S3C64XX_SPI_ENCLK_ENABLE … #define S3C64XX_SPI_PSR_MASK … #define S3C64XX_SPI_MODE_CH_TSZ_BYTE … #define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD … #define S3C64XX_SPI_MODE_CH_TSZ_WORD … #define S3C64XX_SPI_MODE_CH_TSZ_MASK … #define S3C64XX_SPI_MODE_BUS_TSZ_BYTE … #define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD … #define S3C64XX_SPI_MODE_BUS_TSZ_WORD … #define S3C64XX_SPI_MODE_BUS_TSZ_MASK … #define S3C64XX_SPI_MODE_RX_RDY_LVL … #define S3C64XX_SPI_MODE_RX_RDY_LVL_SHIFT … #define S3C64XX_SPI_MODE_SELF_LOOPBACK … #define S3C64XX_SPI_MODE_RXDMA_ON … #define S3C64XX_SPI_MODE_TXDMA_ON … #define S3C64XX_SPI_MODE_4BURST … #define S3C64XX_SPI_CS_NSC_CNT_2 … #define S3C64XX_SPI_CS_AUTO … #define S3C64XX_SPI_CS_SIG_INACT … #define S3C64XX_SPI_INT_TRAILING_EN … #define S3C64XX_SPI_INT_RX_OVERRUN_EN … #define S3C64XX_SPI_INT_RX_UNDERRUN_EN … #define S3C64XX_SPI_INT_TX_OVERRUN_EN … #define S3C64XX_SPI_INT_TX_UNDERRUN_EN … #define S3C64XX_SPI_INT_RX_FIFORDY_EN … #define S3C64XX_SPI_INT_TX_FIFORDY_EN … #define S3C64XX_SPI_ST_RX_FIFO_RDY_V2 … #define S3C64XX_SPI_ST_TX_FIFO_RDY_V2 … #define S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT … #define S3C64XX_SPI_ST_RX_OVERRUN_ERR … #define S3C64XX_SPI_ST_RX_UNDERRUN_ERR … #define S3C64XX_SPI_ST_TX_OVERRUN_ERR … #define S3C64XX_SPI_ST_TX_UNDERRUN_ERR … #define S3C64XX_SPI_ST_RX_FIFORDY … #define S3C64XX_SPI_ST_TX_FIFORDY … #define S3C64XX_SPI_PACKET_CNT_EN … #define S3C64XX_SPI_PACKET_CNT_MASK … #define S3C64XX_SPI_PND_TX_UNDERRUN_CLR … #define S3C64XX_SPI_PND_TX_OVERRUN_CLR … #define S3C64XX_SPI_PND_RX_UNDERRUN_CLR … #define S3C64XX_SPI_PND_RX_OVERRUN_CLR … #define S3C64XX_SPI_PND_TRAILING_CLR … #define S3C64XX_SPI_SWAP_RX_HALF_WORD … #define S3C64XX_SPI_SWAP_RX_BYTE … #define S3C64XX_SPI_SWAP_RX_BIT … #define S3C64XX_SPI_SWAP_RX_EN … #define S3C64XX_SPI_SWAP_TX_HALF_WORD … #define S3C64XX_SPI_SWAP_TX_BYTE … #define S3C64XX_SPI_SWAP_TX_BIT … #define S3C64XX_SPI_SWAP_TX_EN … #define S3C64XX_SPI_FBCLK_MSK … #define FIFO_LVL_MASK(i) … #define S3C64XX_SPI_ST_TX_DONE(v, i) … #define TX_FIFO_LVL(v, sdd) … #define RX_FIFO_LVL(v, sdd) … #define FIFO_DEPTH(i) … #define S3C64XX_SPI_MAX_TRAILCNT … #define S3C64XX_SPI_TRAILCNT_OFF … #define S3C64XX_SPI_POLLING_SIZE … #define msecs_to_loops(t) … #define is_polling(x) … #define RXBUSY … #define TXBUSY … struct s3c64xx_spi_dma_data { … }; /** * struct s3c64xx_spi_port_config - SPI Controller hardware info * @fifo_lvl_mask: [DEPRECATED] use @{rx, tx}_fifomask instead. * @rx_lvl_offset: [DEPRECATED] use @{rx,tx}_fifomask instead. * @fifo_depth: depth of the FIFO. * @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's * length and position. * @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's * length and position. * @tx_st_done: Bit offset of TX_DONE bit in SPI_STATUS regiter. * @clk_div: Internal clock divider * @quirks: Bitmask of known quirks * @high_speed: True, if the controller supports HIGH_SPEED_EN bit. * @clk_from_cmu: True, if the controller does not include a clock mux and * prescaler unit. * @clk_ioclk: True if clock is present on this device * @has_loopback: True if loopback mode can be supported * @use_32bit_io: True if the SoC allows only 32-bit register accesses. * * The Samsung s3c64xx SPI controller are used on various Samsung SoC's but * differ in some aspects such as the size of the fifo and spi bus clock * setup. Such differences are specified to the driver using this structure * which is provided as driver data to the driver. */ struct s3c64xx_spi_port_config { … }; /** * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver. * @clk: Pointer to the spi clock. * @src_clk: Pointer to the clock used to generate SPI signals. * @ioclk: Pointer to the i/o clock between host and target * @pdev: Pointer to device's platform device data * @host: Pointer to the SPI Protocol host. * @cntrlr_info: Platform specific data for the controller this driver manages. * @lock: Controller specific lock. * @state: Set of FLAGS to indicate status. * @sfr_start: BUS address of SPI controller regs. * @regs: Pointer to ioremap'ed controller registers. * @xfer_completion: To indicate completion of xfer task. * @cur_mode: Stores the active configuration of the controller. * @cur_bpw: Stores the active bits per word settings. * @cur_speed: Current clock speed * @rx_dma: Local receive DMA data (e.g. chan and direction) * @tx_dma: Local transmit DMA data (e.g. chan and direction) * @port_conf: Local SPI port configuration data * @port_id: [DEPRECATED] use @{rx,tx}_fifomask instead. * @fifo_depth: depth of the FIFO. * @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's * length and position. * @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's * length and position. */ struct s3c64xx_spi_driver_data { … }; static void s3c64xx_flush_fifo(struct s3c64xx_spi_driver_data *sdd) { … } static void s3c64xx_spi_dmacb(void *data) { … } static int s3c64xx_prepare_dma(struct s3c64xx_spi_dma_data *dma, struct sg_table *sgt) { … } static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable) { … } static int s3c64xx_spi_prepare_transfer(struct spi_controller *spi) { … } static int s3c64xx_spi_unprepare_transfer(struct spi_controller *spi) { … } static bool s3c64xx_spi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { … } static void s3c64xx_iowrite8_32_rep(volatile void __iomem *addr, const void *buffer, unsigned int count) { … } static void s3c64xx_iowrite16_32_rep(volatile void __iomem *addr, const void *buffer, unsigned int count) { … } static void s3c64xx_iowrite_rep(const struct s3c64xx_spi_driver_data *sdd, struct spi_transfer *xfer) { … } static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd, struct spi_transfer *xfer, int dma_mode) { … } static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, int timeout_ms) { … } static int s3c64xx_wait_for_dma(struct s3c64xx_spi_driver_data *sdd, struct spi_transfer *xfer) { … } static int s3c64xx_wait_for_pio(struct s3c64xx_spi_driver_data *sdd, struct spi_transfer *xfer, bool use_irq) { … } static int s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) { … } #define XFER_DMAADDR_INVALID … static int s3c64xx_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { … } static size_t s3c64xx_spi_max_transfer_size(struct spi_device *spi) { … } static int s3c64xx_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { … } static struct s3c64xx_spi_csinfo *s3c64xx_get_target_ctrldata( struct spi_device *spi) { … } /* * Here we only check the validity of requested configuration * and save the configuration in a local data-structure. * The controller is actually configured only just before we * get a message to transfer. */ static int s3c64xx_spi_setup(struct spi_device *spi) { … } static void s3c64xx_spi_cleanup(struct spi_device *spi) { … } static irqreturn_t s3c64xx_spi_irq(int irq, void *data) { … } static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd) { … } #ifdef CONFIG_OF static struct s3c64xx_spi_info *s3c64xx_spi_parse_dt(struct device *dev) { … } #else static struct s3c64xx_spi_info *s3c64xx_spi_parse_dt(struct device *dev) { return dev_get_platdata(dev); } #endif static inline const struct s3c64xx_spi_port_config *s3c64xx_spi_get_port_config( struct platform_device *pdev) { … } static int s3c64xx_spi_set_port_id(struct platform_device *pdev, struct s3c64xx_spi_driver_data *sdd) { … } static void s3c64xx_spi_set_fifomask(struct s3c64xx_spi_driver_data *sdd) { … } static int s3c64xx_spi_probe(struct platform_device *pdev) { … } static void s3c64xx_spi_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM_SLEEP static int s3c64xx_spi_suspend(struct device *dev) { … } static int s3c64xx_spi_resume(struct device *dev) { … } #endif /* CONFIG_PM_SLEEP */ #ifdef CONFIG_PM static int s3c64xx_spi_runtime_suspend(struct device *dev) { … } static int s3c64xx_spi_runtime_resume(struct device *dev) { … } #endif /* CONFIG_PM */ static const struct dev_pm_ops s3c64xx_spi_pm = …; static const struct s3c64xx_spi_port_config s3c2443_spi_port_config = …; static const struct s3c64xx_spi_port_config s3c6410_spi_port_config = …; static const struct s3c64xx_spi_port_config s5pv210_spi_port_config = …; static const struct s3c64xx_spi_port_config exynos4_spi_port_config = …; static const struct s3c64xx_spi_port_config exynos7_spi_port_config = …; static const struct s3c64xx_spi_port_config exynos5433_spi_port_config = …; static const struct s3c64xx_spi_port_config exynos850_spi_port_config = …; static const struct s3c64xx_spi_port_config exynosautov9_spi_port_config = …; static const struct s3c64xx_spi_port_config fsd_spi_port_config = …; static const struct s3c64xx_spi_port_config gs101_spi_port_config = …; static const struct platform_device_id s3c64xx_spi_driver_ids[] = …; static const struct of_device_id s3c64xx_spi_dt_match[] = …; MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match); static struct platform_driver s3c64xx_spi_driver = …; MODULE_ALIAS(…) …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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