// SPDX-License-Identifier: GPL-2.0 /* * SH RSPI driver * * Copyright (C) 2012, 2013 Renesas Solutions Corp. * Copyright (C) 2014 Glider bvba * * Based on spi-sh.c: * Copyright (C) 2011 Renesas Solutions Corp. */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/dmaengine.h> #include <linux/dma-mapping.h> #include <linux/of.h> #include <linux/pm_runtime.h> #include <linux/reset.h> #include <linux/sh_dma.h> #include <linux/spi/spi.h> #include <linux/spinlock.h> #define RSPI_SPCR … #define RSPI_SSLP … #define RSPI_SPPCR … #define RSPI_SPSR … #define RSPI_SPDR … #define RSPI_SPSCR … #define RSPI_SPSSR … #define RSPI_SPBR … #define RSPI_SPDCR … #define RSPI_SPCKD … #define RSPI_SSLND … #define RSPI_SPND … #define RSPI_SPCR2 … #define RSPI_SPCMD0 … #define RSPI_SPCMD1 … #define RSPI_SPCMD2 … #define RSPI_SPCMD3 … #define RSPI_SPCMD4 … #define RSPI_SPCMD5 … #define RSPI_SPCMD6 … #define RSPI_SPCMD7 … #define RSPI_SPCMD(i) … #define RSPI_NUM_SPCMD … #define RSPI_RZ_NUM_SPCMD … #define QSPI_NUM_SPCMD … /* RSPI on RZ only */ #define RSPI_SPBFCR … #define RSPI_SPBFDR … /* QSPI only */ #define QSPI_SPBFCR … #define QSPI_SPBDCR … #define QSPI_SPBMUL0 … #define QSPI_SPBMUL1 … #define QSPI_SPBMUL2 … #define QSPI_SPBMUL3 … #define QSPI_SPBMUL(i) … /* SPCR - Control Register */ #define SPCR_SPRIE … #define SPCR_SPE … #define SPCR_SPTIE … #define SPCR_SPEIE … #define SPCR_MSTR … #define SPCR_MODFEN … /* RSPI on SH only */ #define SPCR_TXMD … #define SPCR_SPMS … /* QSPI on R-Car Gen2 only */ #define SPCR_WSWAP … #define SPCR_BSWAP … /* SSLP - Slave Select Polarity Register */ #define SSLP_SSLP(i) … /* SPPCR - Pin Control Register */ #define SPPCR_MOIFE … #define SPPCR_MOIFV … #define SPPCR_SPOM … #define SPPCR_SPLP2 … #define SPPCR_SPLP … #define SPPCR_IO3FV … #define SPPCR_IO2FV … /* SPSR - Status Register */ #define SPSR_SPRF … #define SPSR_TEND … #define SPSR_SPTEF … #define SPSR_PERF … #define SPSR_MODF … #define SPSR_IDLNF … #define SPSR_OVRF … /* SPSCR - Sequence Control Register */ #define SPSCR_SPSLN_MASK … /* SPSSR - Sequence Status Register */ #define SPSSR_SPECM_MASK … #define SPSSR_SPCP_MASK … /* SPDCR - Data Control Register */ #define SPDCR_TXDMY … #define SPDCR_SPLW1 … #define SPDCR_SPLW0 … #define SPDCR_SPLLWORD … #define SPDCR_SPLWORD … #define SPDCR_SPLBYTE … #define SPDCR_SPLW … #define SPDCR_SPRDTD … #define SPDCR_SLSEL1 … #define SPDCR_SLSEL0 … #define SPDCR_SLSEL_MASK … #define SPDCR_SPFC1 … #define SPDCR_SPFC0 … #define SPDCR_SPFC_MASK … /* SPCKD - Clock Delay Register */ #define SPCKD_SCKDL_MASK … /* SSLND - Slave Select Negation Delay Register */ #define SSLND_SLNDL_MASK … /* SPND - Next-Access Delay Register */ #define SPND_SPNDL_MASK … /* SPCR2 - Control Register 2 */ #define SPCR2_PTE … #define SPCR2_SPIE … #define SPCR2_SPOE … #define SPCR2_SPPE … /* SPCMDn - Command Registers */ #define SPCMD_SCKDEN … #define SPCMD_SLNDEN … #define SPCMD_SPNDEN … #define SPCMD_LSBF … #define SPCMD_SPB_MASK … #define SPCMD_SPB_8_TO_16(bit) … #define SPCMD_SPB_8BIT … #define SPCMD_SPB_16BIT … #define SPCMD_SPB_20BIT … #define SPCMD_SPB_24BIT … #define SPCMD_SPB_32BIT … #define SPCMD_SSLKP … #define SPCMD_SPIMOD_MASK … #define SPCMD_SPIMOD1 … #define SPCMD_SPIMOD0 … #define SPCMD_SPIMOD_SINGLE … #define SPCMD_SPIMOD_DUAL … #define SPCMD_SPIMOD_QUAD … #define SPCMD_SPRW … #define SPCMD_SSLA(i) … #define SPCMD_BRDV_MASK … #define SPCMD_BRDV(brdv) … #define SPCMD_CPOL … #define SPCMD_CPHA … /* SPBFCR - Buffer Control Register */ #define SPBFCR_TXRST … #define SPBFCR_RXRST … #define SPBFCR_TXTRG_MASK … #define SPBFCR_RXTRG_MASK … /* QSPI on R-Car Gen2 */ #define SPBFCR_TXTRG_1B … #define SPBFCR_TXTRG_32B … #define SPBFCR_RXTRG_1B … #define SPBFCR_RXTRG_32B … #define QSPI_BUFFER_SIZE … struct rspi_data { … }; static void rspi_write8(const struct rspi_data *rspi, u8 data, u16 offset) { … } static void rspi_write16(const struct rspi_data *rspi, u16 data, u16 offset) { … } static void rspi_write32(const struct rspi_data *rspi, u32 data, u16 offset) { … } static u8 rspi_read8(const struct rspi_data *rspi, u16 offset) { … } static u16 rspi_read16(const struct rspi_data *rspi, u16 offset) { … } static void rspi_write_data(const struct rspi_data *rspi, u16 data) { … } static u16 rspi_read_data(const struct rspi_data *rspi) { … } /* optional functions */ struct spi_ops { … }; static void rspi_set_rate(struct rspi_data *rspi) { … } /* * functions for RSPI on legacy SH */ static int rspi_set_config_register(struct rspi_data *rspi, int access_size) { … } /* * functions for RSPI on RZ */ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size) { … } /* * functions for QSPI */ static int qspi_set_config_register(struct rspi_data *rspi, int access_size) { … } static void qspi_update(const struct rspi_data *rspi, u8 mask, u8 val, u8 reg) { … } static unsigned int qspi_set_send_trigger(struct rspi_data *rspi, unsigned int len) { … } static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) { … } static void rspi_enable_irq(const struct rspi_data *rspi, u8 enable) { … } static void rspi_disable_irq(const struct rspi_data *rspi, u8 disable) { … } static int rspi_wait_for_interrupt(struct rspi_data *rspi, u8 wait_mask, u8 enable_bit) { … } static inline int rspi_wait_for_tx_empty(struct rspi_data *rspi) { … } static inline int rspi_wait_for_rx_full(struct rspi_data *rspi) { … } static int rspi_data_out(struct rspi_data *rspi, u8 data) { … } static int rspi_data_in(struct rspi_data *rspi) { … } static int rspi_pio_transfer(struct rspi_data *rspi, const u8 *tx, u8 *rx, unsigned int n) { … } static void rspi_dma_complete(void *arg) { … } static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx, struct sg_table *rx) { … } static void rspi_receive_init(const struct rspi_data *rspi) { … } static void rspi_rz_receive_init(const struct rspi_data *rspi) { … } static void qspi_receive_init(const struct rspi_data *rspi) { … } static bool __rspi_can_dma(const struct rspi_data *rspi, const struct spi_transfer *xfer) { … } static bool rspi_can_dma(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { … } static int rspi_dma_check_then_transfer(struct rspi_data *rspi, struct spi_transfer *xfer) { … } static int rspi_common_transfer(struct rspi_data *rspi, struct spi_transfer *xfer) { … } static int rspi_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { … } static int rspi_rz_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { … } static int qspi_trigger_transfer_out_in(struct rspi_data *rspi, const u8 *tx, u8 *rx, unsigned int len) { … } static int qspi_transfer_out_in(struct rspi_data *rspi, struct spi_transfer *xfer) { … } static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) { … } static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer) { … } static int qspi_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer) { … } static u16 qspi_transfer_mode(const struct spi_transfer *xfer) { … } static int qspi_setup_sequencer(struct rspi_data *rspi, const struct spi_message *msg) { … } static int rspi_setup(struct spi_device *spi) { … } static int rspi_prepare_message(struct spi_controller *ctlr, struct spi_message *msg) { … } static int rspi_unprepare_message(struct spi_controller *ctlr, struct spi_message *msg) { … } static irqreturn_t rspi_irq_mux(int irq, void *_sr) { … } static irqreturn_t rspi_irq_rx(int irq, void *_sr) { … } static irqreturn_t rspi_irq_tx(int irq, void *_sr) { … } static struct dma_chan *rspi_request_dma_chan(struct device *dev, enum dma_transfer_direction dir, unsigned int id, dma_addr_t port_addr) { … } static int rspi_request_dma(struct device *dev, struct spi_controller *ctlr, const struct resource *res) { … } static void rspi_release_dma(struct spi_controller *ctlr) { … } static void rspi_remove(struct platform_device *pdev) { … } static const struct spi_ops rspi_ops = …; static const struct spi_ops rspi_rz_ops __maybe_unused = …; static const struct spi_ops qspi_ops __maybe_unused = …; static const struct of_device_id rspi_of_match[] __maybe_unused = …; MODULE_DEVICE_TABLE(of, rspi_of_match); #ifdef CONFIG_OF static void rspi_reset_control_assert(void *data) { … } static int rspi_parse_dt(struct device *dev, struct spi_controller *ctlr) { … } #else #define rspi_of_match … static inline int rspi_parse_dt(struct device *dev, struct spi_controller *ctlr) { return -EINVAL; } #endif /* CONFIG_OF */ static int rspi_request_irq(struct device *dev, unsigned int irq, irq_handler_t handler, const char *suffix, void *dev_id) { … } static int rspi_probe(struct platform_device *pdev) { … } static const struct platform_device_id spi_driver_ids[] = …; MODULE_DEVICE_TABLE(platform, spi_driver_ids); #ifdef CONFIG_PM_SLEEP static int rspi_suspend(struct device *dev) { … } static int rspi_resume(struct device *dev) { … } static SIMPLE_DEV_PM_OPS(rspi_pm_ops, rspi_suspend, rspi_resume); #define DEV_PM_OPS … #else #define DEV_PM_OPS … #endif /* CONFIG_PM_SLEEP */ static struct platform_driver rspi_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …;
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