// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2012 - 2014 Allwinner Tech * Pan Nan <[email protected]> * * Copyright (C) 2014 Maxime Ripard * Maxime Ripard <[email protected]> */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/spi/spi.h> #define SUN4I_FIFO_DEPTH … #define SUN4I_RXDATA_REG … #define SUN4I_TXDATA_REG … #define SUN4I_CTL_REG … #define SUN4I_CTL_ENABLE … #define SUN4I_CTL_MASTER … #define SUN4I_CTL_CPHA … #define SUN4I_CTL_CPOL … #define SUN4I_CTL_CS_ACTIVE_LOW … #define SUN4I_CTL_LMTF … #define SUN4I_CTL_TF_RST … #define SUN4I_CTL_RF_RST … #define SUN4I_CTL_XCH … #define SUN4I_CTL_CS_MASK … #define SUN4I_CTL_CS(cs) … #define SUN4I_CTL_DHB … #define SUN4I_CTL_CS_MANUAL … #define SUN4I_CTL_CS_LEVEL … #define SUN4I_CTL_TP … #define SUN4I_INT_CTL_REG … #define SUN4I_INT_CTL_RF_F34 … #define SUN4I_INT_CTL_TF_E34 … #define SUN4I_INT_CTL_TC … #define SUN4I_INT_STA_REG … #define SUN4I_DMA_CTL_REG … #define SUN4I_WAIT_REG … #define SUN4I_CLK_CTL_REG … #define SUN4I_CLK_CTL_CDR2_MASK … #define SUN4I_CLK_CTL_CDR2(div) … #define SUN4I_CLK_CTL_CDR1_MASK … #define SUN4I_CLK_CTL_CDR1(div) … #define SUN4I_CLK_CTL_DRS … #define SUN4I_MAX_XFER_SIZE … #define SUN4I_BURST_CNT_REG … #define SUN4I_BURST_CNT(cnt) … #define SUN4I_XMIT_CNT_REG … #define SUN4I_XMIT_CNT(cnt) … #define SUN4I_FIFO_STA_REG … #define SUN4I_FIFO_STA_RF_CNT_MASK … #define SUN4I_FIFO_STA_RF_CNT_BITS … #define SUN4I_FIFO_STA_TF_CNT_MASK … #define SUN4I_FIFO_STA_TF_CNT_BITS … struct sun4i_spi { … }; static inline u32 sun4i_spi_read(struct sun4i_spi *sspi, u32 reg) { … } static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value) { … } static inline u32 sun4i_spi_get_tx_fifo_count(struct sun4i_spi *sspi) { … } static inline void sun4i_spi_enable_interrupt(struct sun4i_spi *sspi, u32 mask) { … } static inline void sun4i_spi_disable_interrupt(struct sun4i_spi *sspi, u32 mask) { … } static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len) { … } static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len) { … } static void sun4i_spi_set_cs(struct spi_device *spi, bool enable) { … } static size_t sun4i_spi_max_transfer_size(struct spi_device *spi) { … } static int sun4i_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *tfr) { … } static irqreturn_t sun4i_spi_handler(int irq, void *dev_id) { … } static int sun4i_spi_runtime_resume(struct device *dev) { … } static int sun4i_spi_runtime_suspend(struct device *dev) { … } static int sun4i_spi_probe(struct platform_device *pdev) { … } static void sun4i_spi_remove(struct platform_device *pdev) { … } static const struct of_device_id sun4i_spi_match[] = …; MODULE_DEVICE_TABLE(of, sun4i_spi_match); static const struct dev_pm_ops sun4i_spi_pm_ops = …; static struct platform_driver sun4i_spi_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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