#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/dmaengine.h>
#include <linux/spi/spi.h>
#define SUN6I_AUTOSUSPEND_TIMEOUT …
#define SUN6I_FIFO_DEPTH …
#define SUN8I_FIFO_DEPTH …
#define SUN6I_GBL_CTL_REG …
#define SUN6I_GBL_CTL_BUS_ENABLE …
#define SUN6I_GBL_CTL_MASTER …
#define SUN6I_GBL_CTL_TP …
#define SUN6I_GBL_CTL_RST …
#define SUN6I_TFR_CTL_REG …
#define SUN6I_TFR_CTL_CPHA …
#define SUN6I_TFR_CTL_CPOL …
#define SUN6I_TFR_CTL_SPOL …
#define SUN6I_TFR_CTL_CS_MASK …
#define SUN6I_TFR_CTL_CS(cs) …
#define SUN6I_TFR_CTL_CS_MANUAL …
#define SUN6I_TFR_CTL_CS_LEVEL …
#define SUN6I_TFR_CTL_DHB …
#define SUN6I_TFR_CTL_SDC …
#define SUN6I_TFR_CTL_FBS …
#define SUN6I_TFR_CTL_SDM …
#define SUN6I_TFR_CTL_XCH …
#define SUN6I_INT_CTL_REG …
#define SUN6I_INT_CTL_RF_RDY …
#define SUN6I_INT_CTL_TF_ERQ …
#define SUN6I_INT_CTL_RF_OVF …
#define SUN6I_INT_CTL_TC …
#define SUN6I_INT_STA_REG …
#define SUN6I_FIFO_CTL_REG …
#define SUN6I_FIFO_CTL_RF_RDY_TRIG_LEVEL_MASK …
#define SUN6I_FIFO_CTL_RF_DRQ_EN …
#define SUN6I_FIFO_CTL_RF_RDY_TRIG_LEVEL_BITS …
#define SUN6I_FIFO_CTL_RF_RST …
#define SUN6I_FIFO_CTL_TF_ERQ_TRIG_LEVEL_MASK …
#define SUN6I_FIFO_CTL_TF_ERQ_TRIG_LEVEL_BITS …
#define SUN6I_FIFO_CTL_TF_DRQ_EN …
#define SUN6I_FIFO_CTL_TF_RST …
#define SUN6I_FIFO_STA_REG …
#define SUN6I_FIFO_STA_RF_CNT_MASK …
#define SUN6I_FIFO_STA_TF_CNT_MASK …
#define SUN6I_CLK_CTL_REG …
#define SUN6I_CLK_CTL_CDR2_MASK …
#define SUN6I_CLK_CTL_CDR2(div) …
#define SUN6I_CLK_CTL_CDR1_MASK …
#define SUN6I_CLK_CTL_CDR1(div) …
#define SUN6I_CLK_CTL_DRS …
#define SUN6I_MAX_XFER_SIZE …
#define SUN6I_BURST_CNT_REG …
#define SUN6I_XMIT_CNT_REG …
#define SUN6I_BURST_CTL_CNT_REG …
#define SUN6I_BURST_CTL_CNT_STC_MASK …
#define SUN6I_BURST_CTL_CNT_DRM …
#define SUN6I_BURST_CTL_CNT_QUAD_EN …
#define SUN6I_TXDATA_REG …
#define SUN6I_RXDATA_REG …
struct sun6i_spi_cfg { … };
struct sun6i_spi { … };
static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg)
{ … }
static inline void sun6i_spi_write(struct sun6i_spi *sspi, u32 reg, u32 value)
{ … }
static inline u32 sun6i_spi_get_rx_fifo_count(struct sun6i_spi *sspi)
{ … }
static inline u32 sun6i_spi_get_tx_fifo_count(struct sun6i_spi *sspi)
{ … }
static inline void sun6i_spi_disable_interrupt(struct sun6i_spi *sspi, u32 mask)
{ … }
static inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi)
{ … }
static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi)
{ … }
static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
{ … }
static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
{ … }
static void sun6i_spi_dma_rx_cb(void *param)
{ … }
static int sun6i_spi_prepare_dma(struct sun6i_spi *sspi,
struct spi_transfer *tfr)
{ … }
static int sun6i_spi_transfer_one(struct spi_controller *host,
struct spi_device *spi,
struct spi_transfer *tfr)
{ … }
static irqreturn_t sun6i_spi_handler(int irq, void *dev_id)
{ … }
static int sun6i_spi_runtime_resume(struct device *dev)
{ … }
static int sun6i_spi_runtime_suspend(struct device *dev)
{ … }
static bool sun6i_spi_can_dma(struct spi_controller *host,
struct spi_device *spi,
struct spi_transfer *xfer)
{ … }
static int sun6i_spi_probe(struct platform_device *pdev)
{ … }
static void sun6i_spi_remove(struct platform_device *pdev)
{ … }
static const struct sun6i_spi_cfg sun6i_a31_spi_cfg = …;
static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = …;
static const struct sun6i_spi_cfg sun50i_r329_spi_cfg = …;
static const struct of_device_id sun6i_spi_match[] = …;
MODULE_DEVICE_TABLE(of, sun6i_spi_match);
static const struct dev_pm_ops sun6i_spi_pm_ops = …;
static struct platform_driver sun6i_spi_driver = …;
module_platform_driver(…) …;
MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;